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公开(公告)号：US20210141903A1
公开(公告)日：2021-05-13
申请号：US17134329
申请日：2020-12-26
申请人： Sarathy Jayakumar , Yao Jiewen , Murugasamy K Nachimuthu , Ruixia LI , Siyuan Fu
发明人： Sarathy Jayakumar , Yao Jiewen , Murugasamy K Nachimuthu , Ruixia LI , Siyuan Fu
摘要： Methods and apparatus for seamless SMM (System Management Mode) global driver update base on SMM Root-of-Trust. Mechanisms are provided to load and replace SMM drivers at runtime in a secure manner, without requiring an SMM firmware update and platform reset. SMM code is executed by BIOS during boot in a hidden area of memory called SMRAM space. Seamless update using an SMM Global Driver Update provides a method to load and replace all SMM drivers (including SMM infrastructure) on an already shipped platform production for purposes such as bug fixes. The principles and teachings may also be applied to update other types of secure execution mode code in addition to SMM code.
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公开(公告)号：US09411667B2
公开(公告)日：2016-08-09
申请号：US13997870
申请日：2012-06-06
CPC分类号： G06F11/0751 , G06F11/0712 , G06F11/0745 , G06F11/0793
摘要： Embodiments of apparatus, computer-implemented methods, systems, devices, and computer-readable media are described herein for a computing device with a platform entity such as an interrupt handier configured to notify an operating system or virtual machine monitor executing on the computing device of an input/output error-containment event. In various embodiments, the interrupt handler may be configured to facilitate recovery of a link to an input/output device that caused the input/output error-containment event, responsive to a directive from the operating system or virtual machine monitor.
摘要翻译： 本文描述了具有平台实体的计算设备，例如中断处理器的设备，计算机实现的方法，系统，设备和计算机可读介质的实施例，其被配置为通知在计算设备上执行的操作系统或虚拟机监视器 输入/输出错误容纳事件。 在各种实施例中，响应于来自操作系统或虚拟机监视器的指示，中断处理程序可以被配置为便于恢复导致输入/输出错误容纳事件的输入/输出设备的链接。
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公开(公告)号：US09311138B2
公开(公告)日：2016-04-12
申请号：US13799327
申请日：2013-03-13
CPC分类号： G06F9/4812 , G06F11/0772
摘要： Technologies for system management interrupt (“SMI”) handling include a number of processor cores configured to enter a system management mode (“SMM”) in response to detecting an SMI. The first processor core to enter SMM and acquire a master thread lock sets an in-progress flag and executes a master SMI handler without waiting for other processor cores to enter SMM. Other processor cores execute a subordinate SMI handler. The master SMI handler may direct the subordinate SMI handlers to handle core-specific SMIs. The multi-core processor may set an SMI service pending flag in response to detecting the SMI, which is cleared by the processor core that acquires the master thread lock. A processor core entering SMM may immediately resume normal execution upon determining the in-progress flag is not set and the service pending flag is not set, to detect and mitigate spurious SMIs. Other embodiments are described and claimed.
摘要翻译： 用于系统管理中断（“SMI”）处理的技术包括配置为响应于检测到SMI而进入系统管理模式（“SMM”）的多个处理器核心。 进入SMM并获取主线程锁的第一个处理器核心设置正在进行的标志，并执行主SMI处理程序，而不必等待其他处理器内核进入SMM。 其他处理器核心执行从属SMI处理程序。 主SMI处理程序可以指示下级SMI处理程序来处理核心特定的SMI。 响应于检测到由获取主线程锁的处理器核心清除的SMI，多核处理器可以设置SMI服务挂起标志。 进入SMM的处理器核心在确定进行中标志未被设置并且未设置服务暂挂标志时，可以立即恢复正常执行，以检测和减轻假SMI。 描述和要求保护其他实施例。
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24.发明申请公开(公告)号：US20140188829A1
公开(公告)日：2014-07-03
申请号：US13728451
申请日：2012-12-27
IPC分类号： G06F17/30
CPC分类号： G06F16/21
摘要： Technologies to generate an error record are described herein. A method includes performing a scan of one or more error logs to identify a source of data in response to an attempt to access the data, determining whether an amount of time to complete the scan will exceed a threshold value, and generating a notice that the error record will be deferred based on the determination. A system includes a data collector to scan one or more error logs to identify a source of data in response to an attempt to access the data, a controller to determine whether an amount of time to scan the error logs to identify the source of data will exceed a threshold value, and a signal generator to generate a signal indicating that the error record is to be deferred based on the determination.
摘要翻译： 本文描述了生成错误记录的技术。 一种方法包括：响应于访问数据的尝试，执行一个或多个错误日志的扫描以识别数据源，确定完成扫描的时间量是否将超过阈值，以及生成通知 错误记录将根据确定推迟。 系统包括数据收集器，用于扫描一个或多个错误日志以响应于访问数据的尝试来识别数据源;控制器，用于确定扫描错误日志以识别数据源的时间量是否将 超过阈值，以及信号发生器，用于基于该确定产生指示错误记录被延迟的信号。
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25.发明授权Logic device having status and control registers for recording the status and controlling the operation of memory slots such that each memory slot is identified using a bus address and port number 有权具有状态和控制寄存器的逻辑设备，用于记录状态并控制存储器插槽的操作，使得使用总线地址和端口号识别每个存储器插槽公开(公告)号：US08650414B2
公开(公告)日：2014-02-11
申请号：US12890222
申请日：2010-09-24
CPC分类号： G06F11/3062 , G06F11/3031 , G06F11/3037 , G06F11/327
摘要： Memory reconfiguration during system run-time is described. In one example, a system includes a memory slot to carry a memory board and to connect the memory board to a memory controller for read and write operations, a logic device having a plurality of status registers to record the status of the memory slot and a plurality of control registers to control the operation of the memory slot, and a bus interface coupled through direct signal lines to the memory slot to communicate status and control signals with the memory slot and coupled through a serial bus to the logic device to communicate status and control signals with the logic device.
摘要翻译： 描述系统运行时的内存重新配置。 在一个示例中，系统包括用于承载存储器板并且将存储器板连接到存储器控制器用于读取和写入操作的存储器插槽，具有多个状态寄存器以记录存储器槽的状态的逻辑设备和 多个控制寄存器来控制存储器插槽的操作，以及总线接口，通过直接信号线耦合到存储器插槽，以与存储器槽通信状态和控制信号，并通过串行总线耦合到逻辑器件以传送状态和 控制信号与逻辑器件。
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公开(公告)号：US20110179311A1
公开(公告)日：2011-07-21
申请号：US12971868
申请日：2010-12-17
IPC分类号： G06F11/00
CPC分类号： G06F11/3676
摘要： In some embodiments a request is received to perform an error injection or a memory migration, a mode is entered that blocks requests from agents other than a current processor core or thread, the error is injected or the memory is migrated, and the mode that blocks requests from the agents other than the current processor core or thread is exited. Other embodiments are described and claimed.
摘要翻译： 在一些实施例中，接收到执行错误注入或存储器迁移的请求，输入阻止来自除当前处理器核心或线程以外的代理的请求的模式，注入错误或存储器迁移的模式以及阻止 来自除当前处理器核心或线程之外的代理的请求退出。 描述和要求保护其他实施例。
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27.发明申请Techniques to Communicate with a Controller for a Non-Volatile Dual In-Line Memory Module 有权与非易失性双列直插式存储器模块的控制器进行通信的技术公开(公告)号：US20150378841A1
公开(公告)日：2015-12-31
申请号：US14319361
申请日：2014-06-30
CPC分类号： G06F9/4401 , G06F11/1441 , G06F11/2015
摘要： Examples may include communicating with a controller for a non-volatile dual in-line memory module through a system management bus (SMBus) interface. In some examples, selective assertion of bits maintained in registers accessible through the SMBus interface may enable communication with the controller. The selective assertion may be based on a register map.
摘要翻译： 示例可以包括通过系统管理总线（SMBus）接口与用于非易失性双列直插存储器模块的控制器进行通信。 在一些示例中，通过SMBus接口可访问的寄存器中保持的位的选择性断言可以实现与控制器的通信。 选择性断言可以基于寄存器映射。
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公开(公告)号：US20130212426A1
公开(公告)日：2013-08-15
申请号：US13848830
申请日：2013-03-22
申请人： Robert C. Swanson , Mahesh S. Natu , Rahul Khanna , Murugasamy K. Nachimuthu , Sarathy Jayakumar , Anil S. Keshavamurthy , Narayan Ranganathan
发明人： Robert C. Swanson , Mahesh S. Natu , Rahul Khanna , Murugasamy K. Nachimuthu , Sarathy Jayakumar , Anil S. Keshavamurthy , Narayan Ranganathan
IPC分类号： G06F11/20
CPC分类号： G06F11/203 , G06F11/1666 , G06F11/20
摘要： In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明提供了处理在高可用性系统中的存储器迁移操作期间发生的错误的能力。 此外，可以使用一种方法来将存储在存储器的非镜像存储器区域中的存储器页面动态重映射到镜像存储器区域。 该动态重新映射可以响应于确定存储器页已经被访问多于阈值次数，指示页面上的信息的关键性。 描述和要求保护其他实施例。
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公开(公告)号：US08407516B2
公开(公告)日：2013-03-26
申请号：US12645778
申请日：2009-12-23
申请人： Robert C. Swanson , Mahesh S. Natu , Rahul Khanna , Murugasamy K. Nachimuthu , Sarathy Jayakumar , Anil S. Keshavamurthy , Narayan Ranganathan
发明人： Robert C. Swanson , Mahesh S. Natu , Rahul Khanna , Murugasamy K. Nachimuthu , Sarathy Jayakumar , Anil S. Keshavamurthy , Narayan Ranganathan
IPC分类号： G06F11/00
CPC分类号： G06F11/203 , G06F11/1666 , G06F11/20
摘要： In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed.
摘要翻译： 在一个实施例中，本发明提供了处理在高可用性系统中的存储器迁移操作期间发生的错误的能力。 此外，可以使用一种方法来将存储在存储器的非镜像存储器区域中的存储器页面动态重映射到镜像存储器区域。 该动态重新映射可以响应于确定存储器页已经被访问多于阈值次数，指示页面上的信息的关键性。 描述和要求保护其他实施例。
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30.发明申请公开(公告)号：US20100332707A1
公开(公告)日：2010-12-30
申请号：US12459423
申请日：2009-06-30
申请人： Sarathy Jayakumar
发明人： Sarathy Jayakumar
IPC分类号： G06F13/00
CPC分类号： G06F9/4411
摘要： In some embodiments a signal is sent from a Basic Input/Output System to a device to indicate that the Basic Input/Output System needs to obtain control of shared resources. A signal is sent from the device to the Basic Input/Output System that indicates that the Basic Input/Output System can now control the shared resources. Other embodiments are described and claimed.
摘要翻译： 在一些实施例中，信号从基本输入/输出系统发送到设备，以指示基本输入/输出系统需要获得对共享资源的控制。 信号从设备发送到基本输入/输出系统，指示基本输入/输出系统现在可以控制共享资源。 描述和要求保护其他实施例。
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