-
1.发明授权Logic device having status and control registers for recording the status and controlling the operation of memory slots such that each memory slot is identified using a bus address and port number 有权具有状态和控制寄存器的逻辑设备，用于记录状态并控制存储器插槽的操作，使得使用总线地址和端口号识别每个存储器插槽公开(公告)号：US08650414B2
公开(公告)日：2014-02-11
申请号：US12890222
申请日：2010-09-24
CPC分类号： G06F11/3062 , G06F11/3031 , G06F11/3037 , G06F11/327
摘要： Memory reconfiguration during system run-time is described. In one example, a system includes a memory slot to carry a memory board and to connect the memory board to a memory controller for read and write operations, a logic device having a plurality of status registers to record the status of the memory slot and a plurality of control registers to control the operation of the memory slot, and a bus interface coupled through direct signal lines to the memory slot to communicate status and control signals with the memory slot and coupled through a serial bus to the logic device to communicate status and control signals with the logic device.
摘要翻译： 描述系统运行时的内存重新配置。 在一个示例中，系统包括用于承载存储器板并且将存储器板连接到存储器控制器用于读取和写入操作的存储器插槽，具有多个状态寄存器以记录存储器槽的状态的逻辑设备和 多个控制寄存器来控制存储器插槽的操作，以及总线接口，通过直接信号线耦合到存储器插槽，以与存储器槽通信状态和控制信号，并通过串行总线耦合到逻辑器件以传送状态和 控制信号与逻辑器件。
-
公开(公告)号：US20120079306A1
公开(公告)日：2012-03-29
申请号：US12890222
申请日：2010-09-24
CPC分类号： G06F11/3062 , G06F11/3031 , G06F11/3037 , G06F11/327
摘要： Memory reconfiguration during system run-time is described. In one example, a system includes a memory slot to carry a memory board and to connect the memory board to a memory controller for read and write operations, a logic device having a plurality of status registers to record the status of the memory slot and a plurality of control registers to control the operation of the memory slot, and a bus interface coupled through direct signal lines to the memory slot to communicate status and control signals with the memory slot and coupled through a serial bus to the logic device to communicate status and control signals with the logic device.
摘要翻译： 描述系统运行时的内存重新配置。 在一个示例中，系统包括用于承载存储器板并且将存储器板连接到存储器控制器用于读取和写入操作的存储器插槽，具有多个状态寄存器以记录存储器槽的状态的逻辑设备和 多个控制寄存器来控制存储器插槽的操作，以及总线接口，通过直接信号线耦合到存储器插槽，以与存储器槽通信状态和控制信号，并通过串行总线耦合到逻辑器件以传送状态和 控制信号与逻辑器件。
-
3.发明授权Connector having a cut-out for reduced crosstalk between differential conductors 有权具有用于减小差分导体之间串扰的切口的连接器公开(公告)号：US07459985B2
公开(公告)日：2008-12-02
申请号：US11321892
申请日：2005-12-29
CPC分类号： H01R13/6471 , H01R13/6474 , H05K1/0224 , H05K1/0237 , H05K1/0245 , H05K1/025 , H05K1/117 , H05K9/0066 , H05K2201/09236 , H05K2201/093 , H05K2201/0969
摘要： In some embodiments, an circuit card includes an electronic circuit substrate, a ground plane on the electronic circuit substrate, first and second differential signal pads on the electronic circuit substrate, a ground return signal pad associated with the first and second differential signal pads, the ground return signal pad being connected to the ground plane on the electronic substrate, and a cutout structure on the ground plane positioned near a location where the ground return signal pad connects to the ground plane, wherein the cutout structure is configured to direct a ground return path associated with the first and second differential signal pads to the ground return signal pad associated with the first and second differential signal pads. Other embodiments are disclosed and claimed.
摘要翻译： 在一些实施例中，电路卡包括电子电路基板，电子电路基板上的接地平面，电子电路基板上的第一和第二差分信号焊盘，与第一和第二差分信号焊盘相关联的接地返回信号焊盘， 接地返回信号焊盘连接到电子基板上的接地平面，以及位于靠近接地返回信号焊盘连接到接地平面的位置的接地平面上的切口结构，其中，切除结构被配置为引导接地返回 与第一和第二差分信号焊盘相关联的路径到与第一和第二差分信号焊盘相关联的接地返回信号焊盘。 公开和要求保护其他实施例。
-
-
搜索结果
3 条记录 (耗时 0.01 秒)