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87 条记录 (耗时 0.028 秒)

    Simultaneous transmission and reception of signals in different frequency bands over a bus line
    21.
    发明授权
    Simultaneous transmission and reception of signals in different frequency bands over a bus line 有权
    在总线上同时发送和接收不同频段的信号

    公开(公告)号：US07177288B2

    公开(公告)日：2007-02-13

    申请号：US09998008

    申请日：2001-11-28

    申请人： Stephen R. Mooney ,  Aaron K. Martin ,  Matthew B. Haycock ,  Bryan K. Casper ,  Shekhar Y. Borkar ,  Joseph T. Kennedy ,  James E. Jaussi

    发明人： Stephen R. Mooney ,  Aaron K. Martin ,  Matthew B. Haycock ,  Bryan K. Casper ,  Shekhar Y. Borkar ,  Joseph T. Kennedy ,  James E. Jaussi

    IPC分类号： H04L5/14

    CPC分类号： H04L5/1423

    摘要： A device includes a bus, a first transmitter connected to the bus and configured to transmit a first signal over the bus in a first frequency band, a second transmitter connected to the bus and configured to transmit a second signal over the bus in a second frequency band at the same time that the first transmitter is transmitting the first signal, a first receiver connected to the bus and configured to receive the first signal transmitted over the bus in the first frequency band, and a second receiver connected to the bus and configured to receive the second signal transmitted over the bus in the second frequency band. The first frequency band and the second frequency band occupy different portions of the frequency spectrum.

    摘要翻译： 一种设备包括总线，连接到总线的第一发射机，并且被配置为在第一频带中通过总线传输第一信号，第二发射器连接到总线并且被配置为以第二频率通过总线发送第二信号 与第一发射机正在发送第一信号的同时，连接到总线并被配置为接收通过总线在第一频带中发送的第一信号的第一接收机和连接到总线的第二接收机，并且被配置为 接收在第二频带中通过总线发送的第二信号。 第一频带和第二频带占据频谱的不同部分。

    Digitally controlled variable offset amplifier
    22.
    发明授权
    Digitally controlled variable offset amplifier 有权

    公开(公告)号：US06798293B2

    公开(公告)日：2004-09-28

    申请号：US10631626

    申请日：2003-07-30

    申请人： Bryan K. Casper ,  James E. Jaussi

    发明人： Bryan K. Casper ,  James E. Jaussi

    IPC分类号： H03F345

    CPC分类号： H03M1/1033 ,  H03F3/45183 ,  H03F3/45672 ,  H03F2203/45371 ,  H03M1/46

    摘要： First and second differential transistor pairs, where each may be intentionally unbalanced or balanced, are provided. First and second digitally variable current generators are coupled to control respective tail currents of the first and second differential pairs. A switch circuit may be coupled to equalize the voltages of the respective tail current nodes. A common mode feedback circuit is also described, to improve common mode rejection of the overall amplifier. Applications of the amplifier circuit include sense amplifiers and comparators.

    Analog filter architecture
    23.
    发明授权
    Analog filter architecture 有权

    公开(公告)号：US06768372B2

    公开(公告)日：2004-07-27

    申请号：US10326954

    申请日：2002-12-20

    申请人： James E. Jaussi ,  Bryan K. Casper

    发明人： James E. Jaussi ,  Bryan K. Casper

    IPC分类号： H03K500

    CPC分类号： H03H15/02

    摘要： According to some embodiments, a device includes a phase generator to generate m control signals, each of the m control signals associated with a respective signal period, and at least m filters, each of the at least m filters comprising m-n taps, each of the m-n taps to receive one of the m control signals, to acquire a signal sample according to a signal period associated with the received control signal, and to modulate the signal sample according to a weighting coefficient associated with the tap. The device further includes m evaluation circuits, each evaluation circuit associated with a respective one of the at least m filters and to output a sum of signal samples modulated by the taps of the associated filter in response to one of the m control signals associated with a signal period other than the signal periods according to which the signal samples were acquired.

    Variable offset amplifier circuits and their applications
    24.
    发明授权
    Variable offset amplifier circuits and their applications 失效
    可变偏移放大器电路及其应用

    公开(公告)号：US06756841B2

    公开(公告)日：2004-06-29

    申请号：US10099551

    申请日：2002-03-15

    申请人： James E. Jaussi ,  Bryan K. Casper

    发明人： James E. Jaussi ,  Bryan K. Casper

    IPC分类号： H03F345

    CPC分类号： H03K5/003 ,  H03F2203/45574 ,  H03K5/023

    摘要： A variable offset amplifier circuit includes two differential transistor pairs and a variable current generator coupled to each differential pair to control tail current. Each differential transistor pair has a first transistor and a second transistor. The first transistors are matched in size, as are the second transistors. The bias terminals of the first and second transistors serve as inputs to the amplifier circuit. The output of the amplifier circuit is associated with the differential pair output nodes of only similarly sized transistors, such that loads at the output of the amplifier circuit are sourced with current only from similarly sized transistors of the transistor pairs. The variable current generators may be adjusted to create offset in the output of amplifier circuit. The amplifier circuit has applications in a comparator circuit that also has a regenerative latch circuit, and as a sense amplifier in a receiver of a communications system.

    摘要翻译： 可变偏移放大器电路包括两个差分晶体管对和耦合到每个差分对的可变电流发生器以控制尾电流。 每个差分晶体管对具有第一晶体管和第二晶体管。 第一晶体管尺寸匹配，第二晶体管也是如此。 第一和第二晶体管的偏置端子用作放大器电路的输入。 放大器电路的输出与只有类似尺寸的晶体管的差分对输出节点相关联，使得放大器电路的输出处的负载来自晶体管对的类似大小的晶体管的电流。 可以调节可变电流发生器以在放大器电路的输出中产生偏移。 放大器电路在比较器电路中也具有应用，该比较器电路还具有再生锁存电路，以及作为通信系统的接收器中的读出放大器。

    HOST CONTROLLED IO POWER MANAGEMENT
    28.
    发明申请
    HOST CONTROLLED IO POWER MANAGEMENT 有权
    主机控制IO电源管理

    公开(公告)号：US20130283070A1

    公开(公告)日：2013-10-24

    申请号：US13995591

    申请日：2011-10-17

    申请人： James E. Jaussi ,  Stephen R. Mooney ,  Howard L. Heck ,  Bryan K. Casper ,  Frank T. Hady

    发明人： James E. Jaussi ,  Stephen R. Mooney ,  Howard L. Heck ,  Bryan K. Casper ,  Frank T. Hady

    IPC分类号： G06F1/26

    CPC分类号： G06F1/26 ,  G06F1/266 ,  G06F1/3203

    摘要： Systems and methods of interconnecting devices may include an input/output (IO) connector having a buffer with an integrated voltage regulator. The integrated voltage regulator may include a first supply output and a second supply output, wherein the IO connector includes an IO power contact coupled to the first supply output. The IO connector may also include a logic power contact coupled to the second supply output. In one example, a host device may issue power management commands to the buffer in order to scale the second supply output independently of the first supply output.

    摘要翻译： 互连设备的系统和方法可以包括具有集成稳压器的缓冲器的输入/输出（IO）连接器。 集成电压调节器可以包括第一电源输出和第二电源输出，其中IO连接器包括耦合到第一电源输出的IO电源触点。 IO连接器还可以包括耦合到第二电源输出的逻辑电源触点。 在一个示例中，主机设备可以向缓冲器发布功率管理命令，以便与第一电源输出独立地缩放第二电源输出。