公开(公告)号：US10446539B2

公开(公告)日：2019-10-15

申请号：US15441579

申请日：2017-02-24

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Wei-Jhih Tseng

IPC: H02H9/00 ,  H01L27/02 ,  H02H9/04

Abstract: Embodiments of an electrostatic discharge (ESD) protection device and a method for operating an ESD protection device are described. In one embodiment, an ESD protection device includes three or more bipolar transistors that are configured to shunt current between a first node and a second node in response to an ESD pulse received between the first and second nodes and a diode connected in series with the three or more bipolar transistors and one of the first and second nodes. Each of the three or more bipolar transistors includes a collector comprising collector components, an emitter comprising emitter components, and a base structure comprising a substrate region or an active region. The emitter components are alternately located with respect to the collector components. The substrate region or the active region surrounds the collector components and the emitter components. Other embodiments are also described.

公开(公告)号：US10431578B2

公开(公告)日：2019-10-01

申请号：US15471259

申请日：2017-03-28

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Wei-Jhih Tseng

IPC: H01L27/02 ,  H02H9/04 ,  H01L29/08 ,  H01L29/10 ,  H01L29/78

Abstract: Embodiments of an electrostatic discharge (ESD) protection device and a method for operating an ESD protection device are described. In one embodiment, an ESD protection device includes stacked first and second PNP bipolar transistors that are configured to shunt current between a first node and a second node in response to an ESD pulse received between the first and second nodes and an NMOS transistor connected in series with the stacked first and second PNP bipolar transistors and the second node. An emitter and a base of the second PNP bipolar transistor are connected to a collector of the first PNP bipolar transistor. A gate terminal of the NMOS transistor is connected to a source terminal of the NMOS transistor. Other embodiments are also described.

公开(公告)号：US10381340B2

公开(公告)日：2019-08-13

申请号：US15006812

申请日：2016-01-26

Applicant: NXP B.V.

Inventor： Da-Wei Lai

IPC: H02H9/04 ,  H01L27/02 ,  H01L29/66 ,  H01L29/74

Abstract: An apparatus can include a first circuit that is configured to provide electrostatic discharge (ESD) protection against an ESD pulse applied between a first node and a second node. The first circuit includes a series stack of bipolar transistors that are configured to shunt current between the first and second nodes in response to the ESD pulse; and a diode connected in series with the stack of bipolar transistors and configured to lower a snapback holding voltage of the first circuit when shunting current between the first and second nodes.

公开(公告)号：US20170278839A1

公开(公告)日：2017-09-28

申请号：US15080154

申请日：2016-03-24

Applicant: NXP B.V.

Inventor： Da-Wei Lai

IPC: H01L27/02 ,  H03K17/081 ,  H01L29/06

CPC classification number: H01L27/0262 ,  H01L27/0255 ,  H01L29/0619 ,  H01L29/7436 ,  H03K17/08108

Abstract: A silicon controlled rectifier (SCR) circuit is configured to shunt electrostatic discharge (ESD) current from a node to a reference voltage. The SCR circuit includes a first bipolar PNP transistor having a first emitter connected to the node, a first base, and a first collector. A second bipolar NPN transistor has a second collector sharing a first region with the first base, a second base sharing a second region with the first collector, and an emitter electrically connected to the reference voltage. A guard region is configured and arranged to delay triggering of the SCR circuit in response to an ESD event by impeding current flow in the second region.

公开(公告)号：US20170213816A1

公开(公告)日：2017-07-27

申请号：US15006812

申请日：2016-01-26

Applicant: NXP B.V.

Inventor： Da-Wei Lai

IPC: H01L27/02 ,  H01L29/66 ,  H01L29/74

CPC classification number: H01L27/0255 ,  H01L27/0259 ,  H01L29/66371 ,  H01L29/7416 ,  H02H9/046

Abstract: An apparatus can include a first circuit that is configured to provide electrostatic discharge (ESD) protection against an ESD pulse applied between a first node and a second node. The first circuit includes a series stack of bipolar transistors that are configured to shunt current between the first and second nodes in response to the ESD pulse; and a diode connected in series with the stack of bipolar transistors and configured to lower a snapback holding voltage of the first circuit when shunting current between the first and second nodes.

公开(公告)号：US09545041B2

公开(公告)日：2017-01-10

申请号：US14282581

申请日：2014-05-20

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Taede Smedes

IPC: H02H3/22 ,  H05K9/00 ,  H03K19/003 ,  H05K1/02 ,  H01L27/02 ,  H02H9/04 ,  H01L23/60

CPC classification number: H05K9/0067 ,  H01L23/60 ,  H01L27/0255 ,  H01L27/0266 ,  H01L2924/0002 ,  H02H9/046 ,  H03K19/00346 ,  H05K1/0259 ,  H01L2924/00

Abstract: Embodiments of a method for providing electrostatic discharge (ESD) protection for an Input/Output (I/O) device, an ESD protection device for an I/O device, and an I/O device are described. In one embodiment, a method for providing ESD protection for an I/O device involves activating a switch device to turn off the I/O device during an ESD event and deactivating the switch device to turn on the I/O device in the absence of an ESD event. Other embodiments are also described.

Abstract translation: 描述了用于为输入/输出（I / O）设备提供静电放电（ESD）保护的方法，用于I / O设备的ESD保护设备和I / O设备的实施例。 在一个实施例中，用于为I / O设备提供ESD保护的方法包括在ESD事件期间激活开关设备以关闭I / O设备，并且在不存在I / O设备的情况下停用该开关设备以接通I / O设备 ESD事件。 还描述了其它实施例。

公开(公告)号：US20160225758A1

公开(公告)日：2016-08-04

申请号：US15013070

申请日：2016-02-02

Applicant: NXP B.V.

Inventor： Da-Wei Lai ,  Dolphin Abessolo Bidzo

IPC: H01L27/02 ,  H02H9/04 ,  H01L27/092

CPC classification number: H01L27/0292 ,  H01L27/0251 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/092 ,  H02H9/046

Abstract: A semiconductor device and method. The device includes a first domain and a second domain each having a power rail and a ground rail. The device further includes a signal line connected between the first domain and the second domain. The device also includes an electrostatic discharge protection circuit for providing cross-domain ESD protection. The protection circuit includes a blocking transistor connected between the first domain power rail and the signal line. The protection circuit also includes a power rail clamp connected between the first domain power rail and the first domain ground rail. The power rail clamp is operable to apply a control signal to a gate of the blocking transistor to switch it on during normal operation and to switch it off during an ESD event. The power rail clamp is operable during the ESD event to conduct an ESD current.

Abstract translation: 半导体器件和方法。 该装置包括第一域和第二域，每个具有电力轨和地轨。 该装置还包括连接在第一域和第二域之间的信号线。 该器件还包括用于提供跨域ESD保护的静电放电保护电路。 保护电路包括连接在第一域电源轨和信号线之间的阻塞晶体管。 保护电路还包括连接在第一域电源轨和第一域接地轨之间的电力轨夹。 电源轨钳位可操作以将控制信号施加到阻塞晶体管的栅极，以在正常操作期间将其接通，并在ESD事件期间将其切断。 电源轨钳位在ESD事件期间可操作以传导ESD电流。