公开(公告)号：US08005441B1

公开(公告)日：2011-08-23

申请号：US12117269

申请日：2008-05-08

Applicant: Nadim Khlat ,  David Myara

Inventor： Nadim Khlat ,  David Myara

IPC: H04B1/04 ,  H01Q11/12

CPC classification number: H03G3/3042 ,  H04B2001/0416

Abstract: The present invention relates to estimating a direct current (DC) offset of a power detection circuit when an estimated instantaneous amplitude of a continuous-transmission amplitude-modulated (AM) radio frequency (RF) signal is below a first threshold. The power detection circuit may be used to estimate an average output power associated with the continuous-transmission AM RF signal. The estimated average output power may be used as part of a feedback system to regulate the average output power. The estimated DC offset of the power detection circuit may be used to improve the estimate of the average output power, particularly over temperature and supply voltage variations. Estimating the DC offset of the power detection circuit when the estimated instantaneous amplitude of the continuous-transmission AM RF signal is below the first threshold may minimize errors in the estimated DC offset.

Abstract translation: 本发明涉及当连续发射幅度调制（AM）射频（RF）信号的估计瞬时幅度低于第一阈值时估计功率检测电路的直流偏移。 功率检测电路可以用于估计与连续发送AM RF信号相关联的平均输出功率。 估计的平均输出功率可以用作反馈系统的一部分，以调节平均输出功率。 功率检测电路的估计的DC偏移可以用于改善平均输出功率的估计，特别是在温度和电源电压变化方面。 当估计的连续发送AM RF信号的瞬时幅度低于第一阈值时，估计功率检测电路的DC偏移可以使估计的DC偏移中的误差最小化。

公开(公告)号：US07948964B1

公开(公告)日：2011-05-24

申请号：US11956379

申请日：2007-12-14

Applicant: Nadim Khlat ,  David Myara ,  Jeremie Rafin

Inventor： Nadim Khlat ,  David Myara ,  Jeremie Rafin

IPC: G06F17/00

CPC classification number: H04B1/7073 ,  H04J3/0685 ,  H04W56/0045

Abstract: The present invention relates to synchronization circuitry that is used to synchronize an asynchronous received RF message with a transmitted RF message. In one embodiment of the present invention, the synchronization circuitry includes at least one counter, which is used to associate timing of the asynchronous received RF message with a receive count value, and associate timing of the transmitted RF message with a transmit count value. A time delay between occurrence of the receive count value and the transmit count value provides accurate timing for the start of the transmitted RF message.

Abstract translation: 本发明涉及同步电路，其用于将异步接收的RF消息与发射的RF消息同步。 在本发明的一个实施例中，同步电路包括至少一个计数器，其用于将异步接收的RF消息的定时与接收计数值相关联，并将发送的RF消息的定时与发送计数值相关联。 接收计数值的发生与发送计数值之间的时间延迟为发送的RF消息的开始提供准确的定时。

公开(公告)号：US07724805B1

公开(公告)日：2010-05-25

申请号：US11470340

申请日：2006-09-06

Applicant: Nadim Khlat ,  David Myara

Inventor： Nadim Khlat ,  David Myara

IPC: H04L27/36 ,  H04B1/00

CPC classification number: H04W52/52 ,  H04B17/327 ,  H04B2201/70707 ,  H04J13/004

Abstract: A system and method are provided for quickly measuring the Root Mean Square (RMS) value of digital quadrature signals (I, Q) input to a Wideband Code Division Multiple Access (W-CDMA) transmitter. In general, in a W-CDMA transmitter such as that in a Universal Mobile Telecommunications System (UMTS), multiple channels are combined to provide the digital quadrature signal (I, Q) input to the transmitter. The RMS value of the digital quadrature signal (I, Q) may be determined using a number of consecutive samples of the digital quadrature signal (I, Q) over a period corresponding to mutually orthogonal segments of the spreading codes used for the transmitted channels. As a result of the mutual orthogonality of the segments of the spreading codes, a residual error of the RMS measurement is equal to zero, thereby providing an accurate RMS measurement in much less time than required by traditional RMS measurement schemes.

Abstract translation: 提供了一种用于快速测量输入到宽带码分多址（W-CDMA）发射机的数字正交信号（I，Q）的均方根（RMS）值的系统和方法。 通常，在诸如通用移动电信系统（UMTS）中的W-CDMA发射机中，组合多个信道以提供输入到发射机的数字正交信号（I，Q）。 数字正交信号（I，Q）的RMS值可以在对应于用于发送信道的扩展码的相互正交的段的周期内使用数字正交信号（I，Q）的连续采样数来确定。 作为扩展码段的互相正交性的结果，RMS测量的残余误差等于零，从而在比传统RMS测量方案所要求的时间少得多的时间内提供精确的RMS测量。

公开(公告)号：US06931241B2

公开(公告)日：2005-08-16

申请号：US09746692

申请日：2000-12-21

Applicant: Nadim Khlat ,  Stephen Kuffner

Inventor： Nadim Khlat ,  Stephen Kuffner

IPC: H03M3/02 ,  H03D7/16 ,  H04B1/30 ,  H04B1/40 ,  H04B1/69 ,  H04J11/00 ,  H04B17/02

CPC classification number: H04B1/30 ,  H03D7/166 ,  H04B1/406

Abstract: A communications receiver and a method for receiving and processing information transmitted on either a wide band carrier or a narrow band carrier having In-phase-Quadrature-phase (IQ) modulation, comprising, detecting a portion of the spectrum wide enough to encompass the wide band carrier (BW), converting the wide band carrier to baseband in I and Q components, each component having a bandwidth of BW/2, converting the I and Q components into further I and Q components to form components II, IQ, QI, and QQ of bandwidth equal to BW/4, where each of the sub-bands may contain a portion of the originally transmitted information. Operating in wideband mode, each of the components/is separately processed to extract portions of the originally transmitted information, and operating in a narrowband mode, each of the components containing information is separately processed within the narrow band transmitted carrier to extract portions of the originally transmitted information. The components are then recombined to reconstruct the originally transmitted information.

Abstract translation: 一种用于接收和处理在具有同相正交相位（IQ）调制的宽带载波或窄带载波上发送的信息的通信接收机和方法，包括：检测一部分频谱，以包含宽 频带载波（BW），在I和Q分量中将宽带载波转换为基带，每个分量具有BW / 2的带宽，将I和Q分量转换成更多的I和Q分量以形成分量II，IQ，QI， 和QQ的带宽等于BW / 4，其中每个子带可以包含原始发送的信息的一部分。 在宽带模式下，分别处理每个组件，以提取原始传输信息的部分，并以窄带模式操作，每个包含信息的组件在窄带传输载波内单独处理，以提取原始的 传输信息。 然后将组件重新组合以重建原始传输的信息。

公开(公告)号：US20050118973A1

公开(公告)日：2005-06-02

申请号：US10481977

申请日：2002-06-03

Applicant: Nadim Khlat

Inventor： Nadim Khlat

IPC: H03L7/197 ,  H03D7/16 ,  H03J5/02 ,  H03J7/06 ,  H04B1/30 ,  H04L27/36 ,  H04L27/38 ,  H04B1/06

CPC classification number: H03D7/165 ,  H03J5/0272 ,  H03J7/065 ,  H03L7/1974 ,  H04B1/30

Abstract: Local oscillator apparatus comprising communication signal terminals (LNA IN, LNA INX; RF OUT,RF OUTN) for a communication signal, especially in a receiver or a transmitter, and a controlled frequency oscillator (204; 404) for producing a local oscillator signal. The local oscillator also includes a reference frequency generator (210; 410) and a feedback loop (208;408) for selecting and adjusting the frequency (fVCO) of the local oscillator signal relative to the frequency (fxtal) of said reference frequency signal. A first frequency divider (205; 405) divides the frequency of the local oscillatr signal by a first division factor (M) to produce a conversion signal, where the frequency (FILO) of said conversion signal is at least approximately equal to the frequency (fRF) of the communication signal, and conversion means (202,203; 402, 403) responsive to the conversion signal converts between said communication signal and a base-band signal. A second frequency divider (206;406) divides the frequency of the local oscillator signal by a second division factor (N) and is connected in the feedback loop, where the first division factor (N) is different to the second division factor (M) and the ratios between said first and second division factors (M/N, N/M) are fractional.

Abstract translation: 本地振荡器装置包括用于通信信号的通信信号端（LNA IN，LNA INX; RF OUT，RF OUTN），特别是在接收机或发射机中，以及用于产生本地振荡器信号的受控频率振荡器（204,404）。 本地振荡器还包括参考频率发生器（210; 410）和用于相对于所述参考频率信号的频率（fxtal）选择和调整本地振荡器信号的频率（fVCO）的反馈回路（208; 408）。 第一分频器（205; 405）将本地振荡器信号的频率除以第一分频因子（M）以产生转换信号，其中所述转换信号的频率（FILO）至少近似等于频率 fRF）和响应于转换信号的转换装置（202,203; 402,403）在所述通信信号和基带信号之间进行转换。 第二分频器（206; 406）将本地振荡器信号的频率除以第二分频因子（N），并连接在反馈环路中，其中第一分频因子（N）不同于第二分频因子（M ），并且所述第一和第二分割因子（M / N，N / M）之间的比率是分数的。

公开(公告)号：US06678340B1

公开(公告)日：2004-01-13

申请号：US09535396

申请日：2000-03-24

Applicant: Nadim Khlat ,  Patrick Clement

Inventor： Nadim Khlat ,  Patrick Clement

IPC: H04B110

CPC classification number: H03D3/007 ,  H03D7/166

Abstract: Apparatus 20,30,40,50 for receiving and processing a wanted Radio Frequency signal comprises a radio frequency to intermediate frequency down-conversion stage 20 for receiving the wanted radio frequency signal and out-putting a complex intermediate frequency signal; an analogue to digital converter 30 for converting the complex intermediate frequency signal to a digital complex intermediate signal; an intermediate frequency to base-band down-conversion stage 40 for receiving the digital complex intermediate frequency signal and out-putting a digital complex base-band signal; and a complex notch filter 50 for receiving the digital complex base-band signal and out-putting a notch filtered digital complex base-band signal wherein the complex notch filter 50 substantially filters out a small portion of the base-band signal centred about a first, non-zero, frequency while substantially passing a corresponding portion of the base-band signal centred about a second frequency having the same magnitude but opposite sign to the first frequency.

Abstract translation: 用于接收和处理所需射频信号的设备20,30,40,50包括用于接收所需射频信号并输出​​复合中频信号的射频至中频下变频级20; 用于将复合中频信号转换为数字复合中间信号的模数转换器30; 中频到基带下变频级40，用于接收数字复合中频信号并输出​​数字复基带信号; 以及用于接收数字复基带信号并输出​​陷波滤波的数字复基带信号的复陷波滤波器50，其中复陷波滤波器50基本上过滤掉以第一和第二信号为中心的基带信号的一小部分 ，非零频率，同时基本上将以具有相同幅度但相反符号的第二频率为中心的基带信号的对应部分传送到第一频率。

公开(公告)号：US09954436B2

公开(公告)日：2018-04-24

申请号：US13876518

申请日：2011-09-29

Applicant: Nadim Khlat

Inventor： Nadim Khlat

IPC: H02J1/10 ,  H02J3/00 ,  H02M3/07 ,  H02M1/00

CPC classification number: H02M3/07 ,  H02M2001/009 ,  Y10T307/406

Abstract: The detailed description described embodiments of highly efficient power management systems configurable to simultaneously generate various output voltage levels for different components, sub-assemblies, and devices of electronic devices, sub-systems, and systems. In particular, the described embodiments include power management systems that substantially reduce or eliminate the need for inductors, large numbers of capacitors, and complex switching techniques to transform an available voltage level from a system power source, such as a battery, to more desirable power supply voltages. Some described embodiments include a charge pump that uses only two flying capacitors to simultaneously generate multiple supply outputs, where each of the multiple supply outputs may provide either the same or a different output voltage level. The described embodiments also include efficient power management systems that flexibly provide highly accurate voltage levels that are substantially insensitive to the voltage level provided by a system power source, such as a battery.

公开(公告)号：US09263996B2

公开(公告)日：2016-02-16

申请号：US13552768

申请日：2012-07-19

Applicant: Andrew F. Folkmann ,  James M. Retz ,  Nadim Khlat ,  Jean-Frederic Chiron

Inventor： Andrew F. Folkmann ,  James M. Retz ,  Nadim Khlat ,  Jean-Frederic Chiron

IPC: G06F19/00 ,  H03F3/189 ,  H03F1/02

CPC classification number: H03F3/189 ,  H03F1/0222 ,  H03F2200/411

Abstract: A method of defining a quasi iso-gain supply voltage function for an envelope tracking system is disclosed. The method includes a step of capturing iso-gain supply voltage values versus power values for a device under test (DUT). Other steps involve locating a minimum iso-gain supply voltage value, and then replacing the iso-gain supply voltage values with the minimum iso-gain supply voltage value for corresponding output power values that are less than an output power value corresponding to the minimum iso-gain supply voltage value. The method further includes a step of generating a look-up table (LUT) of iso-gain supply voltage values as a function of input power for the DUT after the step of replacing the iso-gain supply voltage values with the minimum iso-gain supply voltage value for corresponding output power values that are less than an output power value corresponding to the minimum iso-gain supply voltage value.

Abstract translation: 公开了一种定义用于包络跟踪系统的准等增益电源电压功能的方法。 该方法包括捕获等效增益电源电压值与被测器件（DUT）的功率值的步骤。 其他步骤包括定位最小等电位增益电源电压值，然后用对应于最小等效电流的输出功率值的相应输出功率值的最小等效增益电源电压值替换等增益电源电压值 - 电源电压值。 该方法还包括以下步骤：在以等于最小等效增益替换等增益电源电压值的步骤之后，产生作为DUT的输入功率的函数的等增益电源电压值的查找表（LUT） 对于相应的输出功率值的电源电压值小于对应于最小等
差增益电源电压值的输出功率值。

公开(公告)号：US09112570B2

公开(公告)日：2015-08-18

申请号：US13020548

申请日：2011-02-03

Applicant: Nadim Khlat ,  Marcus Granger-Jones

Inventor： Nadim Khlat ,  Marcus Granger-Jones

IPC: H04B7/00 ,  H04B1/10

CPC classification number: H04B1/1036

Abstract: A tunable receiver system uses programmable notch filters to identify available channel pairs for transmitting and receiving data via a femtocell base station. In addition, one of the programmable notch filters may be used to suppress infiltration of the transmit path signal into the receiver path of the receiver device. The other programmable notch filter may be used to suppress a blocker signal identified by the receiver device.

Abstract translation: 可调谐接收机系统使用可编程陷波滤波器来识别用于经由毫微微小区基站发送和接收数据的可用信道对。 此外，可编程陷波滤波器之一可以用于抑制发射路径信号进入接收机设备的接收机路径的渗透。 另一个可编程陷波滤波器可用于抑制由接收机设备识别的阻塞信号。

公开(公告)号：US09075673B2

公开(公告)日：2015-07-07

申请号：US13297470

申请日：2011-11-16

Applicant: Nadim Khlat ,  Shanthi Prasad

Inventor： Nadim Khlat ,  Shanthi Prasad

IPC: H04L27/08 ,  G06F7/556 ,  H03M7/04 ,  G06F1/03

CPC classification number: G06F7/556 ,  G06F1/0307 ,  H03F1/0227 ,  H03M7/04

Abstract: A digital log gain to digital linear gain multiplier is disclosed. The digital log gain to digital linear gain multiplier includes a log gain splitter adapted to split a log gain input into an integer log part and a remainder log part. A log scale-to-linear scale converter is adapted to output a linear gain value in response to the integer log part and the remainder log part. A gain multiply circuit is adapted to multiply a digital signal by the linear gain value to output a gain-enhanced digital signal.

Abstract translation: 公开了对数字线性增益乘数的数字对数增益。 对数字线性增益乘数的数字对数增益包括一个对数增益分配器，适用于将日志增益输入分解为整数对数部分和余数对数部分。 对数缩放比例转换器适于响应于整数对数部分和其余日志部分输出线性增益值。 增益乘法电路适于将数字信号乘以线性增益值以输出增益增强数字信号。