公开(公告)号：US06150243A

公开(公告)日：2000-11-21

申请号：US186065

申请日：1998-11-05

申请人： Karsten Wieczorek ,  Nick Kepler ,  Larry Wang ,  Paul R. Besser

发明人： Karsten Wieczorek ,  Nick Kepler ,  Larry Wang ,  Paul R. Besser

IPC分类号： H01L21/225 ,  H01L21/265 ,  H01L21/28 ,  H01L21/336 ,  H01L21/22 ,  H01L21/38 ,  H01L21/8238

CPC分类号： H01L21/28061 ,  H01L21/2255 ,  H01L21/2257 ,  H01L21/2652 ,  H01L29/665 ,  H01L29/6659

摘要： Self-aligned, ultra-shallow, heavily-doped source and drain regions of a MOS device are formed by implanting dopant containing ions in a dielectric layer formed on metal silicide layer portions on regions of a silicon-containing substrate where source and drain regions are to be formed in a silicon-containing substrate. Thermal treatment of the implanted dielectric layer results in out-diffusion of dopant through the metal silicide layer and into the region of the silicon-containing substrate immediately below the metal silicide layer portions, thereby forming heavily doped source and drain regions having an ultra-shallow junction spaced apart from the metal silicide/silicon substrate interface by a substantially uniform distance.

摘要翻译： MOS器件的自对准，超浅，重掺杂的源极和漏极区域通过在含硅衬底的金属硅化物层部分上形成的电介质层中注入掺杂剂，形成源极和漏极区域 以形成在含硅衬底中。 注入的介电层的热处理导致掺杂剂通过金属硅化物层的外扩散并进入紧邻金属硅化物层部分的含硅衬底区域，由此形成具有超浅的重掺杂源极和漏极区 结合金属硅化物/硅衬底界面与基本均匀的距离间隔开。

公开(公告)号：US6100145A

公开(公告)日：2000-08-08

申请号：US186073

申请日：1998-11-05

申请人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul Raymond Besser

发明人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul Raymond Besser

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/336

CPC分类号： H01L29/6659 ,  H01L21/28052 ,  H01L21/28518 ,  H01L29/41783 ,  H01L29/665 ,  H01L29/6656

摘要： High integrity ultra-shallow source/drain junctions are formed employing cobalt silicide contacts. Field oxide regions, gates, spacers, and source/drain implants are initially formed. A layer of silicon is then deposited. A protective non-contuctive film is then formed and anisotropically etched to expose the silicon layer on the source/drain regions and the top surfaces of the gates, and to form protective spacers on the edges of the field oxide regions and on the side surfaces of the gates. A layer of cobalt is thereafter deposited and silicidation is performed, as by rapid thermal annealing, to form a low-resistance cobalt silicide while consuming the silicon film. The consumption of the silicon film during silicidation results in less consumption of substrate silicon, thereby enabling the formation of ultra-shallow source/drain junctions without junction leakage, allowing the formation of cobalt silicide contacts at optimum thickness and facilitating reliable device scaling.

摘要翻译： 使用硅化钴接触形成高完整性超浅源极/漏极结。 初始形成场氧化物区域，栅极，间隔物和源/漏植入物。 然后沉积一层硅。 然后形成保护性非导电膜，并进行各向异性蚀刻，以暴露栅极/源极区域和栅极顶表面上的硅层，并在场氧化物区域的边缘和侧表面上形成保护隔离物 大门。 此后沉积一层钴，通过快速热退火进行硅化，以在消耗硅膜的同时形成低电阻的硅化钴。 在硅化期间硅膜的消耗导致较少的衬底硅消耗，从而能够形成没有结漏的超浅源极/漏极结，从而允许以最佳厚度形成钴硅化物触点并促进可靠的器件缩放。

公开(公告)号：US06962842B1

公开(公告)日：2005-11-08

申请号：US10382597

申请日：2003-03-06

申请人： Alexander Kalnitsky ,  Sang H. Park ,  Viktor Zekeriya ,  Larry Wang

发明人： Alexander Kalnitsky ,  Sang H. Park ,  Viktor Zekeriya ,  Larry Wang

IPC分类号： H01L21/331 ,  H01L21/8238 ,  H01L21/8249 ,  H01L29/00

CPC分类号： H01L29/66287 ,  H01L21/8249

摘要： A method of removing a sacrificial emitter feature in a bipolar complementary metal oxide semiconductor (BICMOS) process with a super self-aligned bipolar junction transistor (BJT) is disclosed. According to the new method, a mask layer, such as an oxide deposited using high density plasma (HDP) techniques, is deposited over an extrinsic base layer and over a sacrificial emitter structure. Because of the particular characteristic of the HDP oxide, the deposition of HDP oxide forms a triangular-like structure over the sacrificial emitter structure having a maximum thickness less than the thickness of the HDP oxide over the extrinsic base layer. This facilitates the complete removal of the HDP oxide above the sacrificial emitter layer without the complete removal of the HDP oxide above the extrinsic base layer. This allows the removal of the sacrificial emitter structure while the remaining HDP oxide, serving as a mask, protects the underlying extrinsic base layer.

摘要翻译： 公开了一种利用超自对准双极结型晶体管（BJT）去除双极互补金属氧化物半导体（BICMOS）工艺中的牺牲发射极特征的方法。 根据新方法，掩模层，例如使用高密度等离子体（HDP）技术沉积的氧化物沉积在非本征基层上和牺牲发射极结构上。 由于HDP氧化物的特殊特性，HDP氧化物的沉积在牺牲发射极结构上形成三角形结构，其最大厚度小于HDP氧化物在外部基极层上的厚度。 这有助于完全去除牺牲发射极层上方的HDP氧化物，而不会完全去除外部基极层之上的HDP氧化物。 这允许去除牺牲发射器结构，而用作掩模的剩余HDP氧化物保护底层的外在基极层。

公开(公告)号：US08630137B1

公开(公告)日：2014-01-14

申请号：US13028131

申请日：2011-02-15

申请人： Yi He ,  Larry Wang ,  Sean Lynch ,  Che-Ping Chen ,  Wei Zhao ,  Albert Bergemont

发明人： Yi He ,  Larry Wang ,  Sean Lynch ,  Che-Ping Chen ,  Wei Zhao ,  Albert Bergemont

IPC分类号： G11C29/00

CPC分类号： G11C29/00 ,  G11C29/006 ,  G11C29/028 ,  G11C29/50

摘要： A dynamic trim method includes testing a selected number of cells on a die with predetermined testing margins. Data from this testing is used to determine dynamic reference margins for improving yield. Advantageously, yield is improved by allowing functioning fast or slow units to pass wafer sort by applying the dynamic reference margins for varying processes.

摘要翻译： 动态修剪方法包括以预定的测试余量测试在模具上的选定数量的单元。 来自该测试的数据用于确定用于提高产量的动态参考余量。 有利地，通过允许功能快速或慢速单元通过应用用于变化过程的动态参考边缘来通过晶片排序来提高产量。