公开(公告)号：US06380040B1

公开(公告)日：2002-04-30

申请号：US09629883

申请日：2000-08-01

申请人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul R. Besser

发明人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul R. Besser

IPC分类号： H01L21386

CPC分类号： H01L29/665 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/823814 ,  H01L21/823835 ,  H01L21/823878

摘要： High integrity cobalt silicide contacts are formed with shallow source/drain junctions. Embodiments include depositing a layer of cobalt on a substrate above intended source/drain regions, followed by silicidation and diffusing impurities from a doped film during or after silicidation in an environment which discourages out-diffusion of the impurities to the environment. The resulting source/drain junctions are self-aligned to the cobalt silicide/silicon substrate interface, thereby preventing junction leakage while advantageously enabling forming the cobalt silicide contacts at optimum thickness to avoid parasitic series resistances. The formation of self-aligned source/drain junctions to the cobalt silicide/silicon substrate interface facilitates reliable device scaling, while the avoidance of unwanted diffusion of impurities to the environment assures adequate doping of the source/drain regions.

摘要翻译： 高完整性的硅化钴触点形成有浅的源极/漏极结。 实施例包括在期望的源极/漏极区域上方的衬底上沉积钴层，随后在阻止杂质向环境的扩散的环境中硅化处理期间或之后从掺杂膜上硅化并扩散杂质。 所得的源极/漏极结与钴硅化物/硅衬底界面自对准，从而防止结漏电，同时有利地使钴硅化物触点形成最佳厚度以避免寄生串联电阻。 对硅化钴/硅衬底界面的自对准源极/漏极结的形成有利于可靠的器件缩放，同时避免杂质向环境的不期望的扩散确保了源极/漏极区域的充分掺杂。

公开(公告)号：US06150243A

公开(公告)日：2000-11-21

申请号：US186065

申请日：1998-11-05

申请人： Karsten Wieczorek ,  Nick Kepler ,  Larry Wang ,  Paul R. Besser

发明人： Karsten Wieczorek ,  Nick Kepler ,  Larry Wang ,  Paul R. Besser

IPC分类号： H01L21/225 ,  H01L21/265 ,  H01L21/28 ,  H01L21/336 ,  H01L21/22 ,  H01L21/38 ,  H01L21/8238

CPC分类号： H01L21/28061 ,  H01L21/2255 ,  H01L21/2257 ,  H01L21/2652 ,  H01L29/665 ,  H01L29/6659

摘要： Self-aligned, ultra-shallow, heavily-doped source and drain regions of a MOS device are formed by implanting dopant containing ions in a dielectric layer formed on metal silicide layer portions on regions of a silicon-containing substrate where source and drain regions are to be formed in a silicon-containing substrate. Thermal treatment of the implanted dielectric layer results in out-diffusion of dopant through the metal silicide layer and into the region of the silicon-containing substrate immediately below the metal silicide layer portions, thereby forming heavily doped source and drain regions having an ultra-shallow junction spaced apart from the metal silicide/silicon substrate interface by a substantially uniform distance.

摘要翻译： MOS器件的自对准，超浅，重掺杂的源极和漏极区域通过在含硅衬底的金属硅化物层部分上形成的电介质层中注入掺杂剂，形成源极和漏极区域 以形成在含硅衬底中。 注入的介电层的热处理导致掺杂剂通过金属硅化物层的外扩散并进入紧邻金属硅化物层部分的含硅衬底区域，由此形成具有超浅的重掺杂源极和漏极区 结合金属硅化物/硅衬底界面与基本均匀的距离间隔开。

公开(公告)号：US06204177B1

公开(公告)日：2001-03-20

申请号：US09185515

申请日：1998-11-04

申请人： Paul R. Besser ,  Nick Kepler ,  Karsten Wieczorek

发明人： Paul R. Besser ,  Nick Kepler ,  Karsten Wieczorek

IPC分类号： H01L2144

CPC分类号： H01L29/665 ,  H01L21/28518 ,  H01L29/456 ,  H01L29/4933

摘要： A method of forming metal silicide in a semiconductor wafer with reduced junction leakage introduces an alloy at cobalt grain boundaries within a cobalt layer that overlays a silicon layer. The alloy element can be precipitated during deposition of the cobalt and the alloy element, or by an intermediate anneal after deposition. The cobalt layer and the silicon layer are then annealed to form metal silicide regions. By precipitating an alloy at the cobalt grain boundaries, cobalt diffusion at the grain boundaries is retarded during a first rapid thermal annealing step. Bulk diffusion is encouraged, and a more uniform silicide film with reduced interface roughness is produced. Since the interface roughness is reduced with the methods of the present invention, junction leakage is reduced. This allows shallower junctions to be fabricated, leading to devices with improved performance.

摘要翻译： 在具有减少的结漏电的半导体晶片中形成金属硅化物的方法在覆盖硅层的钴层内的钴晶界处引入合金。 在钴和合金元素的沉积期间，或者通过沉积后的中间退火，合金元素可以沉淀。 然后将钴层和硅层退火以形成金属硅化物区域。 通过在钴晶界析出合金，在第一快速热退火步骤期间，在晶界处的钴扩散被延迟。 鼓励扩散，并产生具有降低的界面粗糙度的更均匀的硅化物膜。 由于通过本发明的方法减小了界面粗糙度，所以结漏电减少。 这允许制造较浅的结，导致具有改进性能的器件。

公开(公告)号：US6165903A

公开(公告)日：2000-12-26

申请号：US185516

申请日：1998-11-04

申请人： Paul R. Besser ,  Nick Kepler ,  Karsten Wieczorek

发明人： Paul R. Besser ,  Nick Kepler ,  Karsten Wieczorek

IPC分类号： H01L21/285 ,  H01L21/44

CPC分类号： H01L21/28525 ,  H01L21/28518

摘要： A method for forming ultra shallow junctions in a semiconductor wafer with reduced silicon consumption during salicidation supplies additional silicon during the salicidation process. After the gate and source/drain junctions are formed in a semiconductor device, high resistivity metal silicide regions are formed on the gate and source/drain junctions. Silicon is then deposited in a layer on the high resistivity metal silicide regions. An annealing step is then performed to form low resistivity metal silicide regions on the gate and source/drain junctions. The deposited silicon is a source of silicon that is employed as a diffusion species during the transformation of the high resistivity metal silicide (such as CoSi) to a low resistivity metal silicide (such as CoSi.sub.2). Since the additional silicon provided in the deposited layer is consumed, there is reduced consumption of the silicon from the ultra-shallow junctions, thereby preventing the bottom of the silicide regions from reaching the bottom of the source/drain junctions.

摘要翻译： 用于在半衰期期间形成超浅结的方法，其中在硅化过程中硅消耗减少，在硫化过程中提供额外的硅。 在半导体器件中形成栅极和源极/漏极结之后，在栅极和源极/漏极结上形成高电阻金属硅化物区域。 然后将硅沉积在高电阻率金属硅化物区域上的层中。 然后执行退火步骤以在栅极和源极/漏极结上形成低电阻率金属硅化物区域。 沉积的硅是在将高电阻率金属硅化物（例如CoSi）转变成低电阻率金属硅化物（例如CoSi 2）期间用作扩散物质的硅源。 由于在沉积层中提供的附加硅被消耗，所以硅从超浅结的消耗减少，从而防止硅化物区的底部到达源极/漏极结的底部。

公开(公告)号：US06255214B1

公开(公告)日：2001-07-03

申请号：US09256782

申请日：1999-02-24

申请人： Karsten Wieczorek ,  Nick Kepler ,  Paul R. Besser

发明人： Karsten Wieczorek ,  Nick Kepler ,  Paul R. Besser

IPC分类号： H01L2144

CPC分类号： H01L21/28518

摘要： A method for forming ultra shallow junctions in a semiconductor wafer with reduced junction leakage arising from a silicidation process amorphizes the semiconductor material in the gate and source/drain junctions prior to the deposition of the metal during silicidation. After the gate and source/drain junctions are formed in a semiconductor device, non-dopant material, such as silicon or germanium, is implanted into the semiconductor material in an unmasked implantation procedure. This highly controllable implanting creates amorphous silicon regions with a substantially smooth interface with the crystalline silicon. When the silicide regions are formed during subsequent annealing steps, the silicide forms in a manner that follows the amorphous regions so that the silicide/silicon interface is also substantially smooth and junction leakage induced by silicidation is prevented.

摘要翻译： 在半导体晶片中形成具有减小的由硅化工艺引起的结漏电的超浅结的方法使在硅化物中沉积金属之前的栅极和源极/漏极结中的半导体材料非晶化。 在半导体器件中形成栅极和源极/漏极结之后，在未掩模的注入工艺中将非掺杂材料（例如硅或锗）注入到半导体材料中。 这种高度可控制的植入产生具有与晶体硅基本平滑界面的非晶硅区域。 当在随后的退火步骤期间形成硅化物区域时，硅化物以非晶区域的方式形成，使得硅化物/硅界面也基本上是平滑的，并且防止了由硅化物引起的接合泄漏。

公开(公告)号：US06274511B1

公开(公告)日：2001-08-14

申请号：US09256781

申请日：1999-02-24

申请人： Karsten Wieczorek ,  Nick Kepler ,  Paul R. Besser

发明人： Karsten Wieczorek ,  Nick Kepler ,  Paul R. Besser

IPC分类号： H01L2131

CPC分类号： H01L21/28518

摘要： A method for forming ultra shallow junctions in a semiconductor wafer with reduced junction leakage arising from a silicidation process due to grain boundary induced stress induced junction spiking amorphizes the metal layer prior to annealing during silicidation. After the gate and source/drain junctions are formed in a semiconductor device, dopant or non-dopant material is implanted into the anamorphous metal layer that has been previously deposited over the gate and source/drain junctions. The ion implantation is performed at an energy level sufficient to amorphize the metal (e.g. cobalt), and substantially eliminate grain boundaries in the metal and release grain boundary induced stress. This prevents grain boundary stress induced diffusion of the metal during the first phase of the silicidation process, where the metal is the diffusing species. The silicide regions that are formed during subsequent annealing steps therefore do not exhibit junction spikes.

摘要翻译： 在半导体晶片中形成超浅结的方法，其中由于晶界诱发的应力诱导的接合尖峰而导致的由硅化工艺引起的结的漏点在硅化过程中退火之前对金属层进行了非晶化。 在半导体器件中形成栅极和源极/漏极结之后，将掺杂剂或非掺杂剂材料注入到先前沉积在栅极和源极/漏极结上的无定形金属层中。 离子注入在足以使金属（例如钴）非晶化的能级下进行，并且基本上消除金属中的晶界并释放晶界诱发的应力。 这防止在硅化过程的第一阶段期间金属是扩散物质的晶界应力引起的金属扩散。 因此，在随后的退火步骤期间形成的硅化物区域不会显示结尖峰。

公开(公告)号：US06238986B1

公开(公告)日：2001-05-29

申请号：US09187427

申请日：1998-11-06

申请人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul Raymond Besser

发明人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul Raymond Besser

IPC分类号： H01L2128

CPC分类号： H01L29/66575 ,  H01L21/2257 ,  H01L21/823814 ,  H01L21/823835 ,  H01L29/665

摘要： High integrity shallow source/drain junctions are formed employing cobalt silicide contacts. A layer of cobalt and a cap layer of titanium or titanium nitride are deposited on a substrate above intended source/drain regions, followed by silicidation. Embodiments include low-temperature rapid thermal annealing to form a high-resistivity phase cobalt silicide, removing the cap layer, depositing a doped film on the first phase cobalt silicide, and heating, as by high-temperature rapid thermal annealing, to form a low-resistance cobalt silicide during which impurities from the doped film diffuse through the cobalt silicide into the substrate to form source/drain regions having junctions extending into the substrate a constant depth below the cobalt silicide/silicon substrate interface. In another embodiment, impurities are diffused from the doped film to form source/drain regions and self-aligned junctions following formation of the low-resistance phase cobalt silicide. The formation of source/drain junctions self-aligned to the cobalt silicide/silicon substrate interface prevents junction leakage while allowing the formation of cobalt silicide contacts at optimum thickness to avoid parasitic series resistances, thereby facilitating reliable device scaling.

摘要翻译： 使用硅化钴接触形成高度完整的浅源极/漏极结。 一层钴和钛或氮化钛的覆盖层沉积在预期的源极/漏极区域上的衬底上，随后进行硅化。 实施例包括低温快速热退火以形成高电阻率相硅化钴，去除覆盖层，在第一相钴硅化物上沉积掺杂膜，并且通过高温快速热退火加热以形成低 电阻的硅化钴，其中来自掺杂膜的杂质通过硅化钴扩散到衬底中以形成具有在硅化钴/硅衬底界面下方延伸到衬底中的连续恒定深度的接合的源/漏区。 在另一个实施例中，在形成低电阻相钴硅化物之后，杂质从掺杂膜扩散以形成源/漏区和自对准结。 与硅化钴/硅衬底界面自对准的源极/漏极结的形成可防止结合泄漏，同时允许以最佳厚度形成硅化钴触点，以避免寄生串联电阻，从而便于可靠的器件缩放。

公开(公告)号：US06169005A

公开(公告)日：2001-01-02

申请号：US09318824

申请日：1999-05-26

申请人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul Raymond Besser

发明人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul Raymond Besser

IPC分类号： H01L21386

CPC分类号： H01L21/28518 ,  H01L21/2257 ,  H01L21/76895 ,  H01L29/665

摘要： High integrity ultra-shallow source/drain junctions are formed employing cobalt silicide contacts. These are formed by depositing a layer of cobalt on a substrate above intended source/drain regions, and depositing a doped amorphous silicon film on the cobalt. Silicidation, as by rapid thermal annealing, is performed to form a low-resistance cobalt suicide while consuming the amorphous silicon film and diffusing impurities from the doped amorphous silicon film through the cobalt silicide into the substrate. The diffusion of the impurities forms shallow junctions extending into the substrate a substantially constant depth below the cobalt silicide/silicon substrate interface. The consumption of the amorphous silicon film during silicidation, which results in less consumption of substrate silicon, and formation of source/drain junctions self-aligned to the cobalt silicide/silicon substrate interface, enables the formation of ultra-shallow source/drain junctions without junction leakage while allowing the formation of cobalt silicide contacts at optimum thickness, thereby facilitating reliable device scaling.

摘要翻译： 使用硅化钴接触形成高完整性超浅源极/漏极结。 这些是通过在目标源极/漏极区域上的衬底上沉积钴层而在钴上沉积掺杂的非晶硅膜形成的。 通过快速热退火进行硅化，以形成低电阻的硅化钴，同时消耗非晶硅膜并将杂质从掺杂的非晶硅膜通过硅化钴扩散到衬底中。 杂质的扩散形成延伸到衬底中的浅结，在硅化钴/硅衬底界面下方基本上恒定的深度。 在硅化期间，非晶硅膜的消耗导致较少的衬底硅消耗，以及与硅化钴/硅衬底界面自对准的源极/漏极结的形成使得能够形成超浅源极/漏极结而不形成 结点泄漏，同时允许以最佳厚度形成钴硅化物触点，从而便于可靠的器件缩放。

公开(公告)号：US6162689A

公开(公告)日：2000-12-19

申请号：US187231

申请日：1998-11-06

申请人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul Raymond Besser

发明人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul Raymond Besser

IPC分类号： H01L21/266 ,  H01L21/285 ,  H01L21/336 ,  H01L29/417

CPC分类号： H01L29/66598 ,  H01L21/266 ,  H01L21/28518 ,  H01L29/41775 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659

摘要： High integrity ultra-shallow source/drain junctions are formed employing cobalt silicide contacts. Emdodiments include forming field oxide regions, gates, spacers, and lightly doped implants, and then depositing a layer of oxide on a substrate. The oxide layer is masked to protect portions of the oxide layer located near the gate, where it is desired to have a shallow junction, then etched to expose portions of the intended source/drain regions where the silicided contacts are to be formed. A high-dosage source/drain implant is thereafter carried out to form deep source/drain junctions with the substrate where the oxide layer has been etched away, and to form shallower junctions near the gates, where the implant must travel through the oxide layer before reaching the substrate. A layer of cobalt is thereafter deposited and silicidation is performed to form metal silicide contacts over only the deep source/drain junctions, while the cobalt on the oxide layer (i.e., above the shallower junctions) does not react to form cobalt silicide, and is thereafter removed. The present invention provides ultra-shallow source-drain junctions near the gates for improved electrical characteristics, and deeper junctions away from the gates, with cobalt silicide contacts above only the deeper junction portions to avoid junction leakage, thereby facilitating reliable device scaling.

摘要翻译： 使用硅化钴接触形成高完整性超浅源极/漏极结。 实例包括形成场氧化物区域，栅极，间隔物和轻掺杂的植入物，然后在衬底上沉积氧化物层。 掩模氧化层以保护位于栅极附近的氧化物层的部分，期望具有浅结，然后蚀刻以暴露要形成硅化物触点的预期源/漏区的部分。 此后，进行高剂量源/漏注入，以与氧化物层被蚀刻掉的衬底形成深的源极/漏极结，并且在栅极附近形成较浅的结，其中植入物必须在 到达基板。 此后沉积一层钴，并且仅在深源极/漏极接合处进行硅化以形成金属硅化物接触，而氧化物层上的钴（即，较浅的接合点上方）不反应形成硅化钴，并且是 此后取出。 本发明提供了栅极附近的超浅源极 - 漏极结，用于改善电气特性，以及远离栅极的较深的结，钴硅化物接触仅在较深的接合部分上方，以避免结漏电，从而便于可靠的器件缩放。

公开(公告)号：US6096599A

公开(公告)日：2000-08-01

申请号：US187521

申请日：1998-11-06

申请人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul Raymond Besser

发明人： Nick Kepler ,  Karsten Wieczorek ,  Larry Wang ,  Paul Raymond Besser

IPC分类号： H01L21/225 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L21/8238 ,  H01L21/8242

CPC分类号： H01L29/66575 ,  H01L21/2257 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/823814 ,  H01L21/823835 ,  H01L29/665 ,  Y10S438/923

摘要： High integrity shallow source/drain junctions are formed employing cobalt silicide contacts. Embodiments include depositing a layer of cobalt on a substrate above intended source/drain regions, depositing a cap layer of titanium or titanium nitride on the cobalt, depositing a doped film on the cap layer, and performing silicidation, as by rapid thermal annealing, to form a low-resistivity cobalt silicide and to diffuse impurities from the doped film through the cobalt silicide into the substrate to form a junction extending into the substrate a constant depth below the cobalt silicide interface. The formation of source/drain junctions self-aligned to the cobalt silicide/silicon interface prevents junction leakage while allowing the formation of cobalt silicide contacts at optimum thickness, thereby facilitating reliable device scaling.

摘要翻译： 使用硅化钴接触形成高度完整的浅源极/漏极结。 实施例包括在目标源极/漏极区域上的衬底上沉积钴层，在钴上沉积钛或氮化钛的覆盖层，在覆盖层上沉积掺杂的膜，并通过快速热退火进行硅化， 形成低电阻率的硅化钴，并且通过硅化钴将掺杂的膜中的杂质扩散到衬底中，以形成在硅化钴界面下面延伸到衬底中的恒定深度的结。 与硅化钴/硅界面自对准的源极/漏极结的形成防止结漏，同时允许在最佳厚度下形成硅化钴触点，从而便于可靠的器件缩放。