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    DIVERSITY RECEIVER WITH SHARED LOCAL OSCILLATOR SIGNAL IN DIVERSITY MODE
    21.
    发明申请
    DIVERSITY RECEIVER WITH SHARED LOCAL OSCILLATOR SIGNAL IN DIVERSITY MODE 有权
    多样性接收器，具有多种局部振荡信号

    公开(公告)号：US20140179253A1

    公开(公告)日：2014-06-26

    申请号：US13725228

    申请日：2012-12-21

    Applicant: QUALCOMM INCORPORATED

    Inventor： Prasad Srinivasa Siva Gudem ,  Li Liu ,  Frederic Bossu

    IPC: H03D7/14

    CPC classification number: H03D7/1466 ,  H04B1/005 ,  H04B1/0064 ,  H04B7/0871 ,  Y02D70/40 ,  Y02D70/444

    Abstract: A multi-mode receiver is disclosed that is reconfigurable to share a local oscillator signal in diversity mode to save power consumption. In an exemplary embodiment, an apparatus includes a primary receiver having a primary mixer configured to down-convert a primary signal and a secondary mixer configured to down-convert a secondary signal in carrier aggregation mode. The apparatus also includes a supplemental mixer that uses a shared primary local oscillator (LO) signal generated by a shared primary frequency synthesizer in diversity mode to reduce power consumption. The apparatus further includes a controller configured to disable the secondary mixer and to enable the supplemental mixer to down-convert the secondary signal when operating in the diversity mode.

    Abstract translation: 公开了一种多模式接收机，其可重构以在分集模式下共享本地振荡器信号以节省功耗。 在一个示例性实施例中，一种装置包括主接收机，其具有被配置为对主信号进行下变频的主混合器和被配置为在载波聚合模式中对二级信号进行下变频的二级混合器。 该装置还包括补充混频器，其使用由分集模式中由共享主频率合成器产生的共享主本地振荡器（LO）信号以减少功耗。 该装置还包括控制器，其被配置为在分集模式下操作时禁用辅助混合器并且使辅助混频器能够对次级信号进行下变频。

    Multimode transceiving
    23.
    发明授权
    Multimode transceiving 有权

    公开(公告)号：US11177849B2

    公开(公告)日：2021-11-16

    申请号：US17039775

    申请日：2020-09-30

    Applicant: Qualcomm Incorporated

    Inventor： Chuan Wang ,  Li Liu ,  Kevin Hsi-Huai Wang ,  Bhushan Shanti Asuri ,  Kang Yang ,  Shrenik Patel

    IPC: H04B1/401

    Abstract: An apparatus is disclosed for transceiving signals in multiple modes. In example implementations, an apparatus includes a transceiver that includes a first amplifier; a mixer having at least one input node and at least one output node, with the at least one input node coupled to the first amplifier; and a second amplifier coupled to the at least one output node of the mixer. The transceiver also includes a first register coupled to the first amplifier and a second register coupled to the second amplifier. The transceiver further includes at least one memory realizing a lookup table. The at least one memory is coupled to the first register and the second register. The lookup table includes a first portion corresponding to a first mode of the transceiver and a second portion corresponding to a second mode of the transceiver.

    Diversity receiver with shared local oscillator signal in diversity mode
    24.
    发明授权
    Diversity receiver with shared local oscillator signal in diversity mode 有权
    分集接收器，具有分集模式下的共享本地振荡器信号

    公开(公告)号：US09014648B2

    公开(公告)日：2015-04-21

    申请号：US13725228

    申请日：2012-12-21

    Applicant: QUALCOMM Incorporated

    Inventor： Prasad Srinivasa Siva Gudem ,  Li Liu ,  Frederic Bossu

    IPC: H04B17/02 ,  H03D7/14 ,  H04B1/00 ,  H04B7/08

    CPC classification number: H03D7/1466 ,  H04B1/005 ,  H04B1/0064 ,  H04B7/0871 ,  Y02D70/40 ,  Y02D70/444

    Abstract: A multi-mode receiver is disclosed that is reconfigurable to share a local oscillator signal in diversity mode to save power consumption. In an exemplary embodiment, an apparatus includes a primary receiver having a primary mixer configured to down-convert a primary signal and a secondary mixer configured to down-convert a secondary signal in carrier aggregation mode. The apparatus also includes a supplemental mixer that uses a shared primary local oscillator (LO) signal generated by a shared primary frequency synthesizer in diversity mode to reduce power consumption. The apparatus further includes a controller configured to disable the secondary mixer and to enable the supplemental mixer to down-convert the secondary signal when operating in the diversity mode.

    Abstract translation: 公开了一种多模式接收机，其可重构以在分集模式下共享本地振荡器信号以节省功耗。 在一个示例性实施例中，一种装置包括主接收机，其具有被配置为对主信号进行下变频的主混合器和被配置为在载波聚合模式中对二级信号进行下变频的二级混合器。 该装置还包括补充混频器，其使用由分集模式中的共享主频率合成器产生的共享主本地振荡器（LO）信号以减少功耗。 该装置还包括控制器，其被配置为在分集模式下操作时禁用辅助混合器并且使补充混频器能够对次级信号进行下变频。

    Hybrid voltage controlled oscillator
    25.
    发明授权
    Hybrid voltage controlled oscillator 有权
    混合压控振荡器

    公开(公告)号：US08988158B2

    公开(公告)日：2015-03-24

    申请号：US13836932

    申请日：2013-03-15

    Applicant: QUALCOMM Incorporated

    Inventor： Sujiang Rong ,  Li Liu ,  Yiwu Tang

    IPC: H03B5/12 ,  H03B5/02

    CPC classification number: H03B5/1228 ,  H03B5/02 ,  H03B5/1215 ,  H03B5/1296 ,  H03B2200/0082 ,  H03B2200/009

    Abstract: A method, an apparatus, and a computer program product are provided. The apparatus provides a VCO signal. The apparatus is a VCO. The apparatus includes a first transconductance circuit. The apparatus further includes a second transconductance circuit coupled with the first transconductance circuit. The second transconductance circuit has a first configuration/mode (e.g., CMOS configuration/mode) and a second configuration/mode (e.g., NMOS configuration/mode or PMOS configuration/mode). The second transconductance circuit is configured to couple an input of the second transconductance circuit to the first transconductance circuit in the first configuration/mode. The second transconductance circuit is configured to isolate the input of the second transconductance circuit from the first transconductance circuit in the second configuration/mode. The second transconductance circuit may include a first transistor and a second transistor, and the input may be a gate of each of the first transistor and the second transistor.

    Abstract translation: 提供了一种方法，装置和计算机程序产品。 该装置提供VCO信号。 该装置是VCO。 该装置包括第一跨导电路。 该装置还包括与第一跨导电路耦合的第二跨导电路。 第二跨导电路具有第一配置/模式（例如，CMOS配置/模式）和第二配置/模式（例如，NMOS配置/模式或PMOS配置/模式）。 第二跨导电路被配置为在第一配置/模式中将第二跨导电路的输入耦合到第一跨导电路。 第二跨导电路被配置为在第二配置/模式中将第二跨导电路的输入与第一跨导电路隔离。 第二跨导电路可以包括第一晶体管和第二晶体管，并且输入可以是第一晶体管和第二晶体管中的每一个的栅极。

    Cancelling supply noise in a voltage controlled oscillator circuit
    26.
    发明授权
    Cancelling supply noise in a voltage controlled oscillator circuit 有权
    在压控振荡器电路中取消电源噪声

    公开(公告)号：US08981862B2

    公开(公告)日：2015-03-17

    申请号：US13755130

    申请日：2013-01-31

    Applicant: QUALCOMM Incorporated

    Inventor： Li Liu ,  Chiewcharn Narathong

    IPC: H03B5/12 ,  H03C3/22 ,  H03L1/00 ,  H01L25/00 ,  H03B5/04 ,  H03L7/099

    CPC classification number: H03B5/1228 ,  H01L25/00 ,  H01L2924/0002 ,  H03B5/04 ,  H03B5/1209 ,  H03B5/1243 ,  H03B2200/0088 ,  H03L1/00 ,  H03L7/099 ,  H01L2924/00

    Abstract: A voltage controlled oscillator (VCO) core for cancelling a supply noise is described. The VCO core includes an input node that receives the supply noise. The VCO core also includes a noise path coupled to the input node. The VCO core additionally includes a cancellation path coupled to the input node and the noise path. The cancellation path includes a programmable gain circuit coupled with a first terminal of a varactor. The supply noise passes through the programmable gain circuit to produce a cancellation noise.

    Abstract translation: 描述了用于消除电源噪声的压控振荡器（VCO）芯。 VCO核心包括接收电源噪声的输入节点。 VCO核心还包括耦合到输入节点的噪声路径。 VCO核心还包括耦合到输入节点和噪声路径的消除路径。 消除路径包括与变容二极管的第一端子耦合的可编程增益电路。 电源噪声通过可编程增益电路产生消除噪声。

    FREQUENCY DIVIDER WITH DUTY CYCLE ADJUSTMENT WITHIN FEEDBACK LOOP
    27.
    发明申请
    FREQUENCY DIVIDER WITH DUTY CYCLE ADJUSTMENT WITHIN FEEDBACK LOOP 有权
    频率分频器在反馈环路中进行占空比调整

    公开(公告)号：US20140375363A1

    公开(公告)日：2014-12-25

    申请号：US13926631

    申请日：2013-06-25

    Applicant: QUALCOMM Incorporated

    Inventor： Wu-Hsin Chen ,  Sriramgopal Sridhara ,  Li Liu

    IPC: H03L7/18

    CPC classification number: H03L7/18 ,  H03K3/017 ,  H03K5/1565 ,  H03K21/08

    Abstract: A frequency divider with duty cycle adjustment within a feedback loop is disclosed. In an exemplary design, an apparatus includes at least one divider circuit and at least one duty cycle adjustment circuit coupled in a feedback loop. The divider circuit(s) receive a clock signal at a first frequency and provide at least one divided signal at a second frequency, which is a fraction of the first frequency. The duty cycle adjustment circuit(s) adjust the duty cycle of the at least one divided signal and provide at least one duty cycle adjusted signal to the divider circuit(s). The divider circuit(s) may include first and second latches, and the duty cycle adjustment circuit(s) may include first and second duty cycle adjustment circuits. The first and second latches and the first and second duty cycle adjustment circuits may be coupled in a feedback loop and may perform divide-by-2.

    Abstract translation: 公开了一种在反馈环路内进行占空比调节的分频器。 在示例性设计中，装置包括耦合在反馈回路中的至少一个除法器电路和至少一个占空比调整电路。 分频器电路以第一频率接收时钟信号，并以第二频率提供至少一个分频信号，该第二频率是第一频率的一部分。 占空比调整电路调整至少一个分频信号的占空比，并向分频器电路提供至少一个占空比调整信号。 分频器电路可以包括第一和第二锁存器，并且占空比调整电路可以包括第一和第二占空比调整电路。 第一和第二锁存器以及第一和第二占空比调整电路可以耦合在反馈回路中并且可以执行除以2。

    Multi-mode mixer
    29.
    发明授权
    Multi-mode mixer 有权

    公开(公告)号：US10756772B1

    公开(公告)日：2020-08-25

    申请号：US16418734

    申请日：2019-05-21

    Applicant: Qualcomm Incorporated

    Inventor： Chirag Dipak Patel ,  Jeremy Goldblatt ,  Yunfei Feng ,  Li Liu ,  Xinmin Yu ,  Aliakbar Homayoun

    IPC: H04B1/26 ,  H04B1/30 ,  H04B1/16

    Abstract: An apparatus is disclosed for mixing signals with a multi-mode mixer for frequency translation. In example implementations, a multi-mode mixer includes a supply voltage node, a ground node, a first data signal coupler, and a second data signal coupler. The multi-mode mixer also includes a mixer core and a current control switch. The mixer core is coupled between the first data signal coupler and the second data signal coupler. The current control switch is configured to selectively enable or disable flow of a current through the mixer core. The first data signal coupler, the second data signal coupler, the mixer core, and the current control switch are coupled together in series between the supply voltage node and the ground node.

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