公开(公告)号：US09612970B2

公开(公告)日：2017-04-04

申请号：US14333981

申请日：2014-07-17

Applicant: QUALCOMM Incorporated

Inventor： Subbarao Palacharla ,  Moinul Khan ,  Alain Artieri ,  Kedar Bhole ,  Vinod Chamarty ,  Pankaj Chaurasia ,  Raghu Sankuratri

IPC: G06F12/00 ,  G06F12/0893 ,  G06F12/084 ,  G06F12/12 ,  G06F12/10 ,  G06F12/0895

CPC classification number: G06F12/0893 ,  G06F12/084 ,  G06F12/0895 ,  G06F12/10 ,  G06F12/12 ,  G06F2212/1021 ,  G06F2212/1044 ,  G06F2212/152 ,  G06F2212/601 ,  G06F2212/6046 ,  Y02D10/13

Abstract: Aspects include computing devices, systems, and methods for partitioning a system cache by sets and ways into component caches. A system cache memory controller may manage the component caches and manage access to the component caches. The system cache memory controller may receive system cache access requests specifying component cache identifiers, and match the component cache identifiers with records correlating traits of the component cache identifiers with in a component cache configuration table. The component cache traits may include a set shift trait, set offset trait, and target ways, which may define the locations of the component caches in the system cache. The system cache memory controller may also receive a physical address for the system cache in the system cache access request, determine an indexing mode for the component cache, and translate the physical address for the component cache.

公开(公告)号：US20150234761A1

公开(公告)日：2015-08-20

申请号：US14706203

申请日：2015-05-07

Applicant: QUALCOMM Incorporated

Inventor： Cristian Duroiu ,  Jaya Prakash Subramaniam Ganasan ,  Vinod Chamarty ,  Mark Michael Schaffer ,  Joshua Hirsch Stubbs ,  Robert Nicholson Gibson ,  Kris Tiri ,  Moinul Khan ,  Bohuslav Rychlik ,  Serag GadelRab ,  Simon Booth

IPC: G06F13/37 ,  G06F13/16 ,  G06F13/18 ,  G06F13/42

CPC classification number: G06F13/37 ,  G06F13/1626 ,  G06F13/18 ,  G06F13/362 ,  G06F13/4256 ,  G06F2213/0038 ,  G06F2213/0062 ,  G06F2213/0064 ,  G06F2213/36 ,  Y02D10/14

Abstract: Devices, systems, methods, and computer-readable mediums for arbitrating bus transactions on a communications bus based on health information are disclosed. Health information of master devices can be used to adjust priorities of bus transactions from master devices to meet quality of service requirements of the master devices. In one embodiment, a bus interconnect is provided and configured to communicate bus transactions from any of a plurality of master devices to slave device(s) coupled the bus interconnect. The bus interconnect is further configured to map health information for each of the plurality of master devices into virtual priority space. The bus interconnect is further configured to translate the virtual priority space into a physical priority level for each of the plurality of master devices. The bus interconnect is further configured to arbitrate bus transactions for the plurality of master devices based on physical priority level for the plurality of master devices.

Abstract translation: 公开了用于基于健康信息在通信总线上仲裁总线事务的设备，系统，方法和计算机可读介质。 主设备的健康信息可用于调整主设备总线事务的优先级，以满足主设备的服务质量要求。 在一个实施例中，总线互连被提供和配置为将总线事务从多个主设备中的任一个传送到耦合总线互连的从设备。 总线互连还被配置为将多个主设备中的每一个的健康信息映射到虚拟优先级空间中。 总线互连还被配置为将虚拟优先级空间转换为多个主设备中的每一个的物理优先级。 总线互连还被配置为基于多个主设备的物理优先级来仲裁多个主设备的总线事务。