METHOD AND APPARATUS FOR MONITORING VIA'S IN A SEMICONDUCTOR FAB
    21.
    发明申请
    METHOD AND APPARATUS FOR MONITORING VIA'S IN A SEMICONDUCTOR FAB 有权
    用于通过SEMICONDUCTOR FAB监测的方法和装置

    公开(公告)号:US20110140728A1

    公开(公告)日:2011-06-16

    申请号:US13033792

    申请日:2011-02-24

    Abstract: A method for monitoring a semiconductor fabrication process creates a wafer of semiconductor chips. Each chip has a one or more diodes. Each diode is addressable as part of an array, corresponds to a physical location of the chip, and is connected in series to a stack. The stack is composed of one ore more vertical interconnects and metal contacts. The diode and associated stack of vertical interconnects is addressed, and the current through each of the stacks of vertical interconnects in an array is measured.

    Abstract translation: 用于监测半导体制造工艺的方法产生半导体芯片晶片。 每个芯片都有一个或多个二极管。 每个二极管可寻址作为阵列的一部分,对应于芯片的物理位置,并且串联连接到堆叠。 堆叠由一个更多的垂直互连和金属触点组成。 寻址二极管和相关联的垂直互连堆栈,并测量通过阵列中的每个垂直互连堆叠的电流。

    Constant Current Output Sink or Source
    22.
    发明申请
    Constant Current Output Sink or Source 有权
    恒流输出槽或源

    公开(公告)号:US20100148700A1

    公开(公告)日:2010-06-17

    申请号:US12622745

    申请日:2009-11-20

    CPC classification number: H05B33/0806 H05B33/0815

    Abstract: A constant current output sink or source eliminates a current limiting series resistor for a light emitting diode (LED) and maintains a constant light intensity from the LED for all operating and manufacturing variables of a digital device since the current through the LED is maintained at a constant value. The constant current output sink or source may be programmable for selection of a constant current value from a plurality of constant current values available.

    Abstract translation: 恒定电流输出接收器或源极消除了用于发光二极管(LED)的限流串联电阻器,并且为了数字器件的所有操作和制造变量而保持来自LED的恒定的光强度,因为通过LED的电流维持在 恒定值。 恒流输出接收器或源可以是可编程的,用于从可用的多个恒定电流值中选择恒定电流值。

    Programmable Selective Wake-Up for Radio Frequency Transponder
    23.
    发明申请
    Programmable Selective Wake-Up for Radio Frequency Transponder 有权
    射频应答器可编程选择性唤醒

    公开(公告)号:US20090256674A1

    公开(公告)日:2009-10-15

    申请号:US12490545

    申请日:2009-06-24

    Abstract: A remote keyless entry (RKE) transponder has a programmable selective wake-up filter for determining whether the RKE transponder should wake-up to process a received signal. The wake-up filter correlates the timing of an input signal's carrier amplitude on and off time periods to a predefined programmable time period profile for a desired signal which has a certain carrier on time (time period on) and a certain carrier off time (time period off) arranged into a coded “header.” When a received signal matches the predefined time period profile, then the RKE transponder will wake-up to process the incoming signal data. The predefined time period profile may be programmable and may be stored in a header configuration register. Each RKE transponder has unique predefined time period on and time period off profiles.

    Abstract translation: 远程无钥匙进入(RKE)转发器具有可编程选择性唤醒滤波器,用于确定RKE应答器是否应该被唤醒以处理接收到的信号。 唤醒滤波器将输入信号的载波幅度开和关时间周期的定时与预定的可编程时间段分布相关联,用于对于具有一定载波的时间(时间周期)和某个载波关闭时间(时间周期)的期望信号 期间关闭)排列成编码“标题”。 当接收到的信号与预定义的时间段曲线匹配时,则RKE应答器将被唤醒以处理输入的信号数据。 预定义的时间段简档可以是可编程的,并且可以存储在头部配置寄存器中。 每个RKE转发器具有独特的预定义时间段和时间段关闭配置文件。

    ADAPTIVE ELECTROSTATIC DISCHARGE (ESD) PROTECTION OF DEVICE INTERFACE FOR LOCAL INTERCONNECT NETWORK (LIN) BUS AND THE LIKE
    24.
    发明申请
    ADAPTIVE ELECTROSTATIC DISCHARGE (ESD) PROTECTION OF DEVICE INTERFACE FOR LOCAL INTERCONNECT NETWORK (LIN) BUS AND THE LIKE 有权
    用于本地互连网络(LIN)总线和类似设备接口的自适应静电放电(ESD)保护

    公开(公告)号:US20090128969A1

    公开(公告)日:2009-05-21

    申请号:US12174802

    申请日:2008-07-17

    CPC classification number: H01L27/0266 H02H9/046

    Abstract: Adaptive electrostatic discharge (ESD) protection of a device interface has very good ESD robustness when it is handled or when installed into or removed from a system. And has robust immunity to DPI, electromagnetic interference (EMI) and the like, when it is operational in a system. There is a significant capacitive coupling between the drain and gate of a ESD protection metal oxide semiconductor (MOS) device to enhance ESD protection and lower snap back voltage thereof whenever there is no (or a low level) DPI on the external connection to be protected. Whereupon when a significant DPI/EMI signal is detected on the external connection, the capa citive coupling between the drain and gate of the MOS ESD protection device is disconnected, bypassed or attenuated so that DPI/EMI immunity of the device is enhanced.

    Abstract translation: 器件接口的自适应静电放电(ESD)保护在处理或安装到系统或从系统中移除时具有非常好的ESD鲁棒性。 并且当其在系统中可操作时,具有对DPI,电磁干扰(EMI)等的强大的抗扰性。 在外部连接上没有(或低电平)DPI时,ESD保护金属氧化物半导体(MOS)器件的漏极和栅极之间存在显着的电容耦合,以增强ESD保护和较低的反冲电压。 。 因此当在外部连接上检测到显着的DPI / EMI信号时,MOS ESD保护器件的漏极和栅极之间的电容耦合被断开,旁路或衰减,从而增强了器件的DPI / EMI抗扰度。

    Method and Apparatus for Monitoring VIA's in a Semiconductor Fab
    25.
    发明申请
    Method and Apparatus for Monitoring VIA's in a Semiconductor Fab 有权
    用于监控半导体Fab中的VIA的方法和装置

    公开(公告)号:US20080315195A1

    公开(公告)日:2008-12-25

    申请号:US12128403

    申请日:2008-05-28

    Abstract: A method for monitoring a semiconductor fabrication process creates a wafer of semiconductor chips. Each chip has a one or more diodes. Each diode is addressable as part of an array, corresponds to a physical location of the chip, and is connected in series to a stack. The stack is composed of one ore more vertical interconnects and metal contacts. The diode and associated stack of vertical interconnects is addressed, and the current through each of the stacks of vertical interconnects in an array is measured.

    Abstract translation: 用于监测半导体制造工艺的方法产生半导体芯片晶片。 每个芯片都有一个或多个二极管。 每个二极管可寻址作为阵列的一部分,对应于芯片的物理位置,并且串联连接到堆叠。 堆叠由一个更多的垂直互连和金属触点组成。 寻址二极管和相关联的垂直互连堆栈,并测量通过阵列中的每个垂直互连堆叠的电流。

    Register bank
    26.
    发明授权
    Register bank 有权
    注册银行

    公开(公告)号:US06944739B2

    公开(公告)日:2005-09-13

    申请号:US09957283

    申请日:2001-09-20

    CPC classification number: G11C8/12

    Abstract: A filter register bank, for example, for a CAN module provides parallel and serial access. The filter bank comprises a plurality of memory cells arranged in a matrix of columns and rows, wherein for parallel access all memory cells within a row are selectable and coupled with a first plurality of bus lines and for serial access all memory cells within a column are selectable and coupled with a second plurality of bus lines.

    Abstract translation: 例如,用于CAN模块的滤波器寄存器组提供并行和串行访问。 滤波器组包括以列和行的矩阵排列的多个存储单元,其中为了并行访问,行内的所有存储单元可选择并与第一多个总线相耦合,并且用于串行访问列内的所有存储单元 可选择并且与第二多个总线线路耦合。

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