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    Semiconductor devices and methods of manufacturing the same
    21.
    发明授权
    Semiconductor devices and methods of manufacturing the same 有权

    公开(公告)号：US12207457B2

    公开(公告)日：2025-01-21

    申请号：US18413434

    申请日：2024-01-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yanghee Lee ,  Jonghyuk Park ,  Ilyoung Yoon ,  Boun Yoon ,  Heesook Cheon

    IPC: H10B12/00

    Abstract: A semiconductor device includes a substrate including first and second region, a bit line structure on the first region, key structures on the second region, each key structure having an upper surface substantially coplanar with an upper surface of the bit line structure, a first trench disposed between two adjacent key structures spaced apart from each other in a first direction, a filling pattern in a lower portion of the first trench, the filling pattern having a flat upper surface and including a first conductive material, and a first conductive structure on the flat upper surface of the filling pattern, an upper sidewall of the first trench, and the upper surface of each of the plurality of key structures, the first conductive structure including a second conductive material.

    SEMICONDUCTOR DEVICE
    22.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20230030176A1

    公开(公告)日：2023-02-02

    申请号：US17662316

    申请日：2022-05-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yanghee Lee ,  Jonghyuk Park ,  Jinwoo Bae ,  Boun Yoon ,  Ilyoung Yoon

    IPC: H01L27/108

    Abstract: A semiconductor device may include a substrate including a cell region and a peripheral region, lower electrodes on the cell region of the substrate, a dielectric layer on surfaces of the lower electrodes, a silicon germanium layer on the dielectric layer, a metal plate pattern and a polishing stop layer pattern stacked on the silicon germanium layer, and upper contact plugs physically contacting an upper surface of the silicon germanium layer. The upper contact plugs may have an upper surface farther away from the substrate than an upper surface of the polishing stop layer pattern. The upper contact plugs may be spaced apart from the metal plate pattern and the polishing stop layer pattern.

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
    23.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20220344345A1

    公开(公告)日：2022-10-27

    申请号：US17859247

    申请日：2022-07-07

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yanghee Lee ,  Jonghyuk Park ,  Ilyoung Yoon ,  Boun Yoon ,  Heesook Cheon

    IPC: H01L27/108

    Abstract: A semiconductor device includes a substrate including first and second region, a bit line structure on the first region, key structures on the second region, each key structure having an upper surface substantially coplanar with an upper surface of the bit line structure, a first trench disposed between two adjacent key structures spaced apart from each other in a first direction, a filling pattern in a lower portion of the first trench, the filling pattern having a flat upper surface and including a first conductive material, and a first conductive structure on the flat upper surface of the filling pattern, an upper sidewall of the first trench, and the upper surface of each of the plurality of key structures, the first conductive structure including a second conductive material.

    Semiconductor device and a fabrication method thereof
    25.
    发明授权
    Semiconductor device and a fabrication method thereof 有权

    公开(公告)号：US11183501B2

    公开(公告)日：2021-11-23

    申请号：US16819920

    申请日：2020-03-16

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyesung Park ,  Jinwoo Bae ,  Youngho Koh ,  Jonghyuk Park ,  Boun Yoon ,  Myungjae Jang

    IPC: H01L27/108

    Abstract: A semiconductor device including a substrate having a cell region and a peripheral region; a cell gate structure disposed on the cell region; a first impurity region and a second impurity region, arranged on first and second sides of the cell gate structure in the cell region; a bit line structure disposed on the cell gate structure and connected to the first impurity region; a peripheral gate structure disposed on the peripheral region; a peripheral capping layer disposed on the peripheral region, covering the peripheral gate structure, and having an upper surface at substantially the same level as an upper end of the bit line structure; and a cell contact structure disposed on the second impurity region, and having a conductive barrier and a contact material layer on the conductive barrier, wherein the conductive barrier covers the upper end of the bit line structure.

    Semiconductor device and method of fabricating the same
    26.
    发明授权
    Semiconductor device and method of fabricating the same 有权

    公开(公告)号：US10777560B2

    公开(公告)日：2020-09-15

    申请号：US16833914

    申请日：2020-03-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jonghyuk Park ,  Byoungho Kwon ,  Inho Kim ,  Hyesung Park ,  Jin-Woo Bae ,  Yanghee Lee ,  Inseak Hwang

    IPC: H01L27/108 ,  H01L21/66

    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.

    Semiconductor device and method of fabricating the same
    27.
    发明授权
    Semiconductor device and method of fabricating the same 有权

    公开(公告)号：US10748906B2

    公开(公告)日：2020-08-18

    申请号：US16110658

    申请日：2018-08-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jonghyuk Park ,  Byoungho Kwon ,  Inho Kim ,  Hyesung Park ,  Jin-Woo Bae ,  Yanghee Lee ,  Inseak Hwang

    IPC: H01L27/108 ,  H01L21/66

    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.

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