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公开(公告)号:US11411004B2
公开(公告)日:2022-08-09
申请号:US16903040
申请日:2020-06-16
发明人: Yanghee Lee , Jonghyuk Park , Ilyoung Yoon , Boun Yoon , Heesook Cheon
IPC分类号: H01L27/108
摘要: A semiconductor device includes a substrate including first and second region, a bit line structure on the first region, key structures on the second region, each key structure having an upper surface substantially coplanar with an upper surface of the bit line structure, a first trench disposed between two adjacent key structures spaced apart from each other in a first direction, a filling pattern in a lower portion of the first trench, the filling pattern having a flat upper surface and including a first conductive material, and a first conductive structure on the flat upper surface of the filling pattern, an upper sidewall of the first trench, and the upper surface of each of the plurality of key structures, the first conductive structure including a second conductive material.
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公开(公告)号:US10756092B2
公开(公告)日:2020-08-25
申请号:US16814387
申请日:2020-03-10
发明人: Jonghyuk Park , Byoungho Kwon , Inho Kim , Hyesung Park , Jin-Woo Bae , Yanghee Lee , Inseak Hwang
IPC分类号: H01L27/108 , H01L21/66
摘要: A method of fabricating a semiconductor device includes providing a substrate including a pair of first regions and a second region therebetween, forming first patterns on the respective first regions to at least partially define a stepwise portion at the second region, and forming a dummy pattern that at least partially fills the stepwise portion. The dummy pattern may be an electrically floating structure. The dummy pattern may be formed as part of forming second patterns on the respective first regions, and the dummy pattern and the second patterns may include substantially common materials. Because the dummy pattern at least partially fills the stepwise portion at the second region, the material layer covering the second patterns and the dummy pattern may omit a corresponding stepwise portion.
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公开(公告)号:USD810073S1
公开(公告)日:2018-02-13
申请号:US29568419
申请日:2016-06-17
设计人: Junwon Bae , Jonghyuk Park , Euiju Lee
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公开(公告)号:USD804447S1
公开(公告)日:2017-12-05
申请号:US29567057
申请日:2016-06-06
设计人: Kihyun Yoon , Jonghyuk Park
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公开(公告)号:US20190019742A1
公开(公告)日:2019-01-17
申请号:US15868544
申请日:2018-01-11
发明人: Yanghee LEE , Jonghyuk Park , Choongseob Shin , Hyojin Oh , Boun Yoon , IIyoung Yoon
IPC分类号: H01L23/48 , H01L27/108 , H01L21/768 , H01L25/065
摘要: A semiconductor may include a substrate including a cell array region and a TSV region, an insulation layer disposed on the substrate and having a recess region on the TSV region, a capacitor on the insulation layer of the cell array region, a dummy support pattern disposed on the insulation layer of the TSV region and overlapping the recess region, when viewed in plan, and a TSV electrode penetrating the dummy support pattern and the substrate.
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公开(公告)号:USD767530S1
公开(公告)日:2016-09-27
申请号:US29533113
申请日:2015-07-14
设计人: Junwon Bae , Jonghyuk Park , Hoyoung Joo , Gunwoong Kim , Kio Lee
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公开(公告)号:US20240155830A1
公开(公告)日:2024-05-09
申请号:US18413434
申请日:2024-01-16
发明人: Yanghee Lee , Jonghyuk Park , Ilyoung Yoon , Boun Yoon , Heesook Cheon
IPC分类号: H10B12/00
CPC分类号: H10B12/37 , H10B12/0387 , H10B12/482 , H10B12/50
摘要: A semiconductor device includes a substrate including first and second region, a bit line structure on the first region, key structures on the second region, each key structure having an upper surface substantially coplanar with an upper surface of the bit line structure, a first trench disposed between two adjacent key structures spaced apart from each other in a first direction, a filling pattern in a lower portion of the first trench, the filling pattern having a flat upper surface and including a first conductive material, and a first conductive structure on the flat upper surface of the filling pattern, an upper sidewall of the first trench, and the upper surface of each of the plurality of key structures, the first conductive structure including a second conductive material.
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公开(公告)号:US11910594B2
公开(公告)日:2024-02-20
申请号:US17859247
申请日:2022-07-07
发明人: Yanghee Lee , Jonghyuk Park , Ilyoung Yoon , Boun Yoon , Heesook Cheon
IPC分类号: H10B12/00
CPC分类号: H10B12/37 , H10B12/0387 , H10B12/482 , H10B12/50
摘要: A semiconductor device includes a substrate including first and second region, a bit line structure on the first region, key structures on the second region, each key structure having an upper surface substantially coplanar with an upper surface of the bit line structure, a first trench disposed between two adjacent key structures spaced apart from each other in a first direction, a filling pattern in a lower portion of the first trench, the filling pattern having a flat upper surface and including a first conductive material, and a first conductive structure on the flat upper surface of the filling pattern, an upper sidewall of the first trench, and the upper surface of each of the plurality of key structures, the first conductive structure including a second conductive material.
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公开(公告)号:US20210134806A1
公开(公告)日:2021-05-06
申请号:US16903040
申请日:2020-06-16
发明人: Yanghee Lee , Jonghyuk Park , Ilyoung Yoon , Boun Yoon , Heesook Cheon
IPC分类号: H01L27/108
摘要: A semiconductor device includes a substrate including first and second region, a bit line structure on the first region, key structures on the second region, each key structure having an upper surface substantially coplanar with an upper surface of the bit line structure, a first trench disposed between two adjacent key structures spaced apart from each other in a first direction, a filling pattern in a lower portion of the first trench, the filling pattern having a flat upper surface and including a first conductive material, and a first conductive structure on the flat upper surface of the filling pattern, an upper sidewall of the first trench, and the upper surface of each of the plurality of key structures, the first conductive structure including a second conductive material.
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公开(公告)号:USD833431S1
公开(公告)日:2018-11-13
申请号:US29568429
申请日:2016-06-17
设计人: Junwon Bae , Deokyeol Lee , Jonghyuk Park , Euiju Lee
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