公开(公告)号：US20210203057A1

公开(公告)日：2021-07-01

申请号：US16859009

申请日：2020-04-27

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Rung-Jeng Lin ,  Han-Hung Chen ,  Shi-Min Zhou ,  Kuo-Hua Yu ,  Chang-Fu Lin

IPC: H01Q1/22 ,  H01L23/498 ,  H01L23/66 ,  H01L23/00

Abstract: An electronic package is disclosed. An antenna board is stacked on a circuit board. A frame is formed on the circuit board. A supporter disposed between the antenna board and the circuit board is secured in the frame. In a packaging process, the frame ensures that the antenna board and the circuit board are separated at a distance that complies with a requirement, and that the antenna function of the antenna board can function normally.

公开(公告)号：US20200168523A1

公开(公告)日：2020-05-28

申请号：US16533716

申请日：2019-08-06

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kuo-Hua Yu ,  Wen-Shan Tsai ,  En-Li Lin ,  Kaun-I Cheng ,  Wei-Ping Wang

IPC: H01L23/367 ,  H01L23/00 ,  H01L21/48 ,  F28F13/18

Abstract: An electronic package is provided. A heat dissipator is bonded via a thermal interface layer to an electronic component disposed on a carrier. The heat dissipator has a concave-convex structure to increase a heat-dissipating area of the thermal interface layer. Therefore, the heat dissipator has a better heat-dissipating effect.

公开(公告)号：US20200091109A1

公开(公告)日：2020-03-19

申请号：US16691477

申请日：2019-11-21

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Min Lo ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kuo-Hua Yu ,  Hsiang-Hua Huang

IPC: H01L23/00 ,  H01L21/48

Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

公开(公告)号：US20190123424A1

公开(公告)日：2019-04-25

申请号：US15961103

申请日：2018-04-24

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Shi-Min Zhou ,  Han-Hung Chen ,  Rung-Jeng Lin ,  Kuo-Hua Yu ,  Chang-Fu Lin

IPC: H01Q1/22 ,  H05K1/14 ,  H05K1/18 ,  H05K3/36 ,  H05K3/34 ,  H05K3/28

Abstract: An electronic package and a method for fabricating the same are provided. The method includes stacking an antenna board on a circuit board, and disposing between the antenna board and the circuit board a supporting body securing the antenna board and the circuit board. As such, during a packaging process, the distance between the antenna board and the circuit board is kept unchanged due to the supporting body, thus ensuring that the antenna board operates properly and improving the product yield.

公开(公告)号：US12278189B2

公开(公告)日：2025-04-15

申请号：US18376652

申请日：2023-10-04

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chih-Ming Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/498

Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.

公开(公告)号：US20240038670A1

公开(公告)日：2024-02-01

申请号：US18376652

申请日：2023-10-04

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chih-Ming Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/498

CPC classification number: H01L23/5381 ,  H01L21/481 ,  H01L23/49833 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/5385 ,  H01L21/4853

Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.

公开(公告)号：US11810862B2

公开(公告)日：2023-11-07

申请号：US17978493

申请日：2022-11-01

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chih-Ming Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/498

CPC classification number: H01L23/5381 ,  H01L21/481 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5385 ,  H01L21/4853

Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.

公开(公告)号：US20230136541A1

公开(公告)日：2023-05-04

申请号：US17568913

申请日：2022-01-05

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： You-Chen Lin ,  Yu-Min Lo ,  Kuo-Hua Yu ,  Jun-Hao Feng

IPC: H01L23/538 ,  H01L21/48

Abstract: An electronic package is provided and includes a protection layer formed on the electronic structure having a plurality of conductors to cover the plurality of conductors, a dielectric layer having a plurality of grooves to enable the electronic structure to be bonded onto one side of the dielectric layer with the protection layer thereon such that each of the plurality of conductors is correspondingly accommodated in each of the plurality of grooves, and a plurality of conductive components disposed on another side of the dielectric layer. Accordingly, the design of the grooves is used to correspond to the high and low surfaces of the electronic structure such that the problem of poor manufacturing process can be avoided.

公开(公告)号：US20230014476A1

公开(公告)日：2023-01-19

申请号：US17850527

申请日：2022-06-27

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chih-Ming Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

IPC: H01L23/42 ,  H01L23/40 ,  H01L21/54 ,  H01L21/56

Abstract: An electronic package, in which a heat dissipation structure is disposed on a carrier structure to form a packaging space for electronic components to be accommodated in the packaging space, and the electronic components are completely encapsulated by a heat dissipation material to prevent the electronic components exposing from the heat dissipation material so as to improve the heat dissipation effect.

公开(公告)号：US20220406642A1

公开(公告)日：2022-12-22

申请号：US17392462

申请日：2021-08-03

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chih-Ming Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

IPC: H01L21/683 ,  H01L23/00

Abstract: A flip-chip process is to provide a pressing jig with a channel, so that the pressing jig grips a chip module by vacuum suction through the channel, and the chip module can be bonded onto a circuit board via a plurality of solder bumps through the pressing jig, and then a heating device is provided to heat the plurality of solder bumps and reflow the plurality of solder bumps. Therefore, the chip module can be vacuum-gripped by the pressing jig to suppress deformation of the chip module, so that the solder bumps can effectively connect to corresponding contacts of the circuit board.