公开(公告)号：US20200091188A1

公开(公告)日：2020-03-19

申请号：US16388579

申请日：2019-04-18

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/1157 ,  H01L27/11565 ,  H01L27/24 ,  H01L45/00

摘要： A method of manufacturing a serniconductor device includes forming holes passing through a stacked structure, surrounding channel structures, and replacing some of the materials of the stacked structure through the holes.

公开(公告)号：US20200091187A1

公开(公告)日：2020-03-19

申请号：US16384764

申请日：2019-04-15

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L27/11582 ,  H01L29/10

摘要： The present disclosure relates to a semiconductor device having improved structural stability and a method of manufacturing such a semiconductor device. The semiconductor device includes a first stacked structure and a second stacked structure. The semiconductor device further includes a first support including a first upper pillar passing through the second stacked structure and including at least two first lower pillars extending from the first upper pillar and passing through the first stacked structure.

公开(公告)号：US20200066753A1

公开(公告)日：2020-02-27

申请号：US16667786

申请日：2019-10-29

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/51 ,  H01L21/768 ,  H01L23/535 ,  H01L29/423 ,  H01L21/28 ,  H01L27/11575

摘要： A semiconductor device and a method of manufacturing a semiconductor device may be provided. The semiconductor device may include a source line formed over a substrate. The semiconductor device may include a channel pattern including a connection part disposed over the source line, and pillar parts protruding from the connection part in a first direction. The semiconductor device may include a well structure protruding from the connection part in the first direction and spaced apart from the source line. The semiconductor device may include a source contact structure protruding from the source line in the first direction and passing through the connection part. The semiconductor device may include a gate stack disposed between the source contact structure and the well structure and enclosing the pillar parts over the connection part.

公开(公告)号：US20200035702A1

公开(公告)日：2020-01-30

申请号：US16299252

申请日：2019-03-12

申请人： SK hynix Inc.

发明人： Jin Won LEE ,  Nam Jae LEE

IPC分类号： H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/1157 ,  H01L27/11573 ,  H01L23/535 ,  H01L21/768

摘要： A semiconductor device includes a source structure penetrated by a first penetrating portion, a first stack structure disposed on the source structure and penetrated by a second penetrating portion overlapping the first penetrating portion.

公开(公告)号：US20190341251A1

公开(公告)日：2019-11-07

申请号：US16515954

申请日：2019-07-18

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L21/02 ,  H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11575

摘要： Provided herein is a method for manufacturing a semiconductor device. The method may include: forming a stack including at least one first material layer and at least one second material layer which are alternately stacked; forming first holes through which the at least one first material layer is exposed; forming etch stop patterns in the respective first holes; forming at least one slit passing through the stack; replacing the at least one first material layer with at least one third material layer through the at least one slit; and forming first contact plugs in the respective first holes, the first contact plugs passing through the etch stop patterns and coupled with the at least one third material layer.

公开(公告)号：US20190081065A1

公开(公告)日：2019-03-14

申请号：US15927802

申请日：2018-03-21

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/11573 ,  H01L21/28 ,  H01L21/768 ,  H01L23/535 ,  H01L29/423 ,  H01L29/51

摘要： A semiconductor device and a method of manufacturing a semiconductor device may be provided. The semiconductor device may include a source line formed over a substrate. The semiconductor device may include a channel pattern including a connection part disposed over the source line, and pillar parts protruding from the connection part in a first direction. The semiconductor device may include a well structure protruding from the connection part in the first direction and spaced apart from the source line. The semiconductor device may include a source contact structure protruding from the source line in the first direction and passing through the connection part. The semiconductor device may include a gate stack disposed between the source contact structure and the well structure and enclosing the pillar parts over the connection part.

公开(公告)号：US20170317088A1

公开(公告)日：2017-11-02

申请号：US15268832

申请日：2016-09-19

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L27/115 ,  H01L23/528 ,  H01L27/11551 ,  H01L27/11526 ,  H01L27/11578 ,  H01L27/11573

CPC分类号： H01L27/115 ,  H01L23/528 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11548 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11578 ,  H01L27/11582

摘要： A semiconductor device may include a first cell structure, a second cell structure, a pad structure, a circuit, and an opening. The pad structure may include a first stepped structure and a second stepped structure located between the first cell structure and the second cell structure. The first stepped structure may include first pads electrically connected to the first and second cell structures and stacked on top of each other, and the second stepped structure may include second pads electrically connected to the first and second cell structures and stacked on top of each other. The circuit may be located under the pad structure. The opening may pass through the pad structure to expose the circuit, and may be located between the first stepped structure and the second stepped structure to insulate the first pads and the second pads from each other.

公开(公告)号：US20170213846A1

公开(公告)日：2017-07-27

申请号：US15358269

申请日：2016-11-22

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L27/115 ,  H01L29/78

CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11575 ,  H01L29/7827

摘要： The semiconductor device according to the embodiments of the present disclosure may include a contact line connecting a pair of channel pillars with a silt disposed therebetween. The contact line may extend in various directions, for example, a diagonal direction with respect to the slit. The contact line may contacts an upper surface or a side wall of the channel pillars.

公开(公告)号：US20170033117A1

公开(公告)日：2017-02-02

申请号：US14987908

申请日：2016-01-05

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L27/115 ,  H01L23/522 ,  H01L21/768 ,  H01L23/528

CPC分类号： H01L27/11582 ,  H01L21/76816 ,  H01L21/76879 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/11524 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11575

摘要： Provided herein is a semiconductor device including N stacked groups (where N is a natural number greater than or equal to two) sequentially stacked over a substrate, each stacked group including interlayer insulating films and conductive patterns alternately stacked, and N concave portions each having stepped sidewalls formed in the interlayer insulating films and the conductive patterns of the stacked groups, the N concave portions each having stepped sidewalls being aligned in a first direction.

摘要翻译： 本文提供了一种半导体器件，其包括顺序层叠在衬底上的N个堆叠组（其中N为大于或等于2的自然数），每个堆叠组包括层间绝缘膜和交替堆叠的导电图案，以及N个凹入部分，每个具有阶梯状 在层间绝缘膜中形成的侧壁和堆叠组的导电图案，每个具有阶梯状侧壁的N个凹部沿第一方向对准。

公开(公告)号：US20150137209A1

公开(公告)日：2015-05-21

申请号：US14203745

申请日：2014-03-11

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L27/115 ,  H01L29/792 ,  H01L29/66

CPC分类号： H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

摘要： A semiconductor device includes a first channel layer, a second channel layer protruding from the first channel layer, a pipe gate including a silicide area surrounding the first channel layer, a tunnel insulating layer surrounding the second channel layer, a data storage layer surrounding the second channel layer with the tunnel insulating layer interposed therebetween, and interlayer insulating layers and conductive patterns which are alternately stacked while surrounding the second channel layer with the data storage layer and the tunnel insulating layer interposed therebetween.

摘要翻译： 半导体器件包括第一沟道层，从第一沟道层突出的第二沟道层，包括围绕第一沟道层的硅化物区的管栅极，围绕第二沟道层的隧道绝缘层，围绕第二沟道层的第二沟道层的数据存储层 沟道绝缘层之间的沟道层，层间绝缘层和导电图案，其间隔着数据存储层和隧道绝缘层围绕第二沟道层交替层叠。