公开(公告)号：US20240331738A1

公开(公告)日：2024-10-03

申请号：US18348959

申请日：2023-07-07

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： G11C5/06 ,  H10B43/10 ,  H10B43/27 ,  H10B43/30

CPC分类号： G11C5/063 ,  H10B43/10 ,  H10B43/27 ,  H10B43/30 ,  H10B43/40

摘要： A semiconductor device including a first block word line, and a first channel layer located in the first block word line. the semiconductor device including a source pad connected to the first channel layer and located on the first block word line, and a first drain pad connected to the first channel layer and located on the first block word line. The semiconductor device including a global word line connected to the source pad, and a first local word line connected to the first drain pad.

公开(公告)号：US20240266339A1

公开(公告)日：2024-08-08

申请号：US18640295

申请日：2024-04-19

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L25/18 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27 ,  H10B43/40

CPC分类号： H01L25/18 ,  H01L24/32 ,  H01L25/0657 ,  H01L25/50 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27 ,  H10B43/40 ,  H01L2224/32145 ,  H01L2224/83896 ,  H01L2924/1431 ,  H01L2924/14511

摘要： There are provided a semiconductor memory device and a manufacturing method of a semiconductor memory device. The semiconductor memory device includes: a peripheral circuit layer; a bonding structure disposed on the peripheral circuit layer; a channel structure disposed on the bonding structure; a first gate contact structure including a first vertical part penetrating the bonding structure and a first horizontal part intersecting with the first vertical part and extending from the first vertical part; and a first gate conductive pattern in contact with a sidewall of the first horizontal part, the first gate conductive pattern being spaced apart from the first vertical part, the first gate conductive pattern extending to surround the channel structure.

公开(公告)号：US20240244841A1

公开(公告)日：2024-07-18

申请号：US18618675

申请日：2024-03-27

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H10B43/23 ,  H10B43/27 ,  H10B43/35

CPC分类号： H10B43/23 ,  H10B43/27 ,  H10B43/35

摘要： A semiconductor device and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a source structure formed on a base, an etch prevention layer formed on the source structure, bit lines, a stack structure located between the etch prevention layer and the bit lines and including conductive layers and insulating layers that are alternately stacked on each other; and a source contact structure extending into the stack structure in a vertical direction to be coupled to the source structure, wherein the source contact structure includes polysilicon.

公开(公告)号：US20240038751A1

公开(公告)日：2024-02-01

申请号：US18479431

申请日：2023-10-02

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L25/18 ,  G11C16/24 ,  G11C16/08 ,  H01L23/00 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/41 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40

CPC分类号： H01L25/18 ,  G11C16/24 ,  G11C16/08 ,  H01L24/20 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/41 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B43/40 ,  H01L2924/1431 ,  H01L2924/1438

摘要： A semiconductor device includes: a substrate extending in a first direction and a second direction intersecting with the first direction; a plurality of input/output pads disposed at one side of the substrate; a first circuit adjacent to the input/output pads in the first direction; a second circuit disposed to be spaced farther apart from the input/output pads in the first direction than the first circuit; a first memory cell array overlapping the first circuit; a second memory cell array overlapping the second circuit; first metal source patterns overlapping the first memory cell array and being spaced apart from each other in the second direction; and a second metal source pattern overlapping the second memory cell array and formed to have a width wider than a width of each of the first metal source patterns in the second direction.

公开(公告)号：US20230343388A1

公开(公告)日：2023-10-26

申请号：US18340214

申请日：2023-06-23

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： G11C11/413

CPC分类号： G11C11/413 ,  H10B10/00

摘要： There are provided a semiconductor memory device and a manufacturing method thereof. The semiconductor memory device includes: a source layer; a channel structure extending in a first direction from within the source layer; a source-channel contact layer surrounding the channel structure on the source layer; a first select gate layer overlapping with the source-channel contact layer and surrounding the channel structure; a stack including interlayer insulating layers and conductive patterns that are alternately stacked in the first direction and surrounding the channel structure, the stack overlapping with the first select gate layer; and a first insulating pattern that is formed thicker between the first select gate layer and the channel structure than between the stack and the channel structure.

公开(公告)号：US20230232630A1

公开(公告)日：2023-07-20

申请号：US18115544

申请日：2023-02-28

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/40

CPC分类号： H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40 ,  H10B43/10 ,  H10B43/40

摘要： A semiconductor memory device, and a method of manufacturing the semiconductor memory device, includes a gate stack including interlayer insulating layers and word lines alternately stacked in a first direction, channel pillars passing through the gate stack and tapering toward the first direction, source select lines surrounding the channel pillars and extending to overlap the gate stack, and a source isolation insulating layer overlapping the gate stack between the source select lines and tapering toward a direction opposite to the first direction.

公开(公告)号：US20230178485A1

公开(公告)日：2023-06-08

申请号：US18103228

申请日：2023-01-30

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L23/528 ,  H10B43/27

CPC分类号： H01L23/528 ,  H10B43/27

摘要： A semiconductor device includes: a stack structure including conductive patterns and stack insulating layers, which are alternately stacked; a channel structure penetrating the stack structure; a tunnel insulating layer surrounding the channel structure; a cell storage pattern surrounding the tunnel insulating layer; and a dummy storage pattern surrounding the tunnel insulating layer, the dummy storage pattern being spaced apart from the cell storage pattern. The conductive patterns include a select conductive pattern in contact with the tunnel insulating layer.

公开(公告)号：US20230051615A1

公开(公告)日：2023-02-16

申请号：US17975241

申请日：2022-10-27

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L27/11582 ,  H01L27/11573 ,  H01L27/11565

摘要： A memory device and a method of manufacturing the memory device includes a stacked structure having a cell region and a slimming region. The memory device also includes a plurality of vertical channel structures each including memory cells and vertically passing through the stacked structure in the cell region. The memory device further includes a plurality of support structures each having a structure of each of the vertical channel structures and vertically passing through the stacked structure in the slimming region. The plurality of support structures have different heights depending on the shape of the stacked structure in the slimming region.

公开(公告)号：US20230045057A1

公开(公告)日：2023-02-09

申请号：US17970360

申请日：2022-10-20

申请人： SK hynix Inc.

发明人： Nam Jae LEE

IPC分类号： H01L27/11529 ,  H01L23/535 ,  H01L29/417 ,  H01L27/11573 ,  H01L27/112

摘要： A semiconductor device may include a plurality of first contact structures, plug-shaped second contact structures configured to be connected to a first number of the plurality of first contact structures, respectively, a slit-shaped second contact structure configured to be connected to a second number of the plurality of first contact structures, adjacent in a first direction, and a third contact structure configured to be connected to sidewalls of the plug-shaped second contact structures, adjacent in the first direction.

公开(公告)号：US20220310653A1

公开(公告)日：2022-09-29

申请号：US17841348

申请日：2022-06-15

申请人： SK hynix Inc.

发明人： Nam Kuk KIM ,  Nam Jae LEE

IPC分类号： H01L27/11582 ,  H01L27/24

摘要： A semiconductor memory device and a method of manufacturing the semiconductor memory device are provided. The semiconductor memory device includes a doped semiconductor pattern including a body portion and a first protrusion protruding from the body portion in a first direction, a first channel pattern disposed on a top surface of the first protrusion and extending in the first direction, a first memory pattern surrounding a sidewall of the first channel pattern and extending on a sidewall of the first protrusion, and interlayer insulating layers and conductive patterns alternately stacked on each other in the first direction.