公开(公告)号：US20200303564A1

公开(公告)日：2020-09-24

申请号：US16825214

申请日：2020-03-20

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Simone RASCUNA' ,  Mario Giuseppe SAGGIO

IPC: H01L29/872 ,  H01L29/20 ,  H01L29/16 ,  H01L29/06 ,  H01L29/45 ,  H01L29/47 ,  H01L29/66

Abstract: A merged-PN-Schottky, MPS, diode includes an N substrate, an N-drift layer, a P-doped region in the drift layer, an ohmic contact on the P-doped region, a plurality of cells within the P-doped region and being portions of the drift layer where the P-doped region is absent, an anode metallization on the ohmic contact and on said cells, to form junction-barrier contacts and Schottky contacts respectively. The P-doped region has a grid-shaped layout separating from one another each cell and defining, together with the cells, an active area of the MPS diode. Each cell has a same geometry among quadrangular, quadrangular with rounded corners and circular; and the ohmic contact extends at the doped region with continuity along the grid-shaped layout.

公开(公告)号：US20200176442A1

公开(公告)日：2020-06-04

申请号：US16780769

申请日：2020-02-03

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Mario Giuseppe SAGGIO ,  Simone RASCUNÁ

IPC: H01L27/06 ,  H01L29/872 ,  H01L29/06 ,  H01L29/10 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78 ,  H01L21/04 ,  H01L29/08 ,  H01L29/423

Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.

公开(公告)号：US20240222424A1

公开(公告)日：2024-07-04

申请号：US18464141

申请日：2023-09-08

Applicant: STMicroelectronics S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Angelo MAGRI' ,  Edoardo ZANETTI ,  Alfio GUARNERA

IPC: H01L29/06 ,  H01L29/16

CPC classification number: H01L29/0607 ,  H01L29/1608

Abstract: An electronic device includes a semiconductor body of silicon carbide, and a body region at a first surface of the semiconductor body. A source region is disposed in the body region. A drain region is disposed at a second surface of the semiconductor body. A doped region extends seamlessly at the entire first surface of the semiconductor body and includes one or more first sub-regions having a first doping concentration and one or more second sub-regions having a second doping concentration lower than the first doping concentration. Thus, the device has zones alternated to each other having different conduction threshold voltage and different saturation current.

公开(公告)号：US20240162040A1

公开(公告)日：2024-05-16

申请号：US18509043

申请日：2023-11-14

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Edoardo ZANETTI ,  Simone RASCUNA' ,  Mario Giuseppe SAGGIO ,  Alfio GUARNERA ,  Leonardo FRAGAPANE ,  Cristina TRINGALI

IPC: H01L21/04 ,  H01L21/285 ,  H01L29/06 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78 ,  H01L29/872

CPC classification number: H01L21/046 ,  H01L21/0495 ,  H01L21/28537 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/66143 ,  H01L29/66734 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872 ,  H01L29/8725

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

公开(公告)号：US20230411158A1

公开(公告)日：2023-12-21

申请号：US18459273

申请日：2023-08-31

Applicant: STMicroelectronics S.r.l.

Inventor： Simone RASCUNA' ,  Paolo BADALA' ,  Anna BASSI ,  Mario Giuseppe SAGGIO ,  Giovanni FRANCO

IPC: H01L21/04 ,  H01L29/16 ,  H01L29/45 ,  H01L29/47

CPC classification number: H01L21/0485 ,  H01L21/0495 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/47

Abstract: A method for manufacturing an electronic device based on SiC includes forming a structural layer of SiC on a front side of a substrate. The substrate has a back side that is opposite to the front side along a direction. Active regions of the electronic device are formed in the structure layer, and the active regions are configured to generate or conduct electric current during the use of the electronic device. A first electric terminal is formed on the structure layer, and an intermediate layer is formed at the back side of the substrate. The intermediate layer is heated by a LASER beam in order to generate local heating such as to favor the formation of an ohmic contact of Titanium compounds. A second electric terminal of the electronic device is formed on the intermediate layer.

公开(公告)号：US20230317843A1

公开(公告)日：2023-10-05

申请号：US18188359

申请日：2023-03-22

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Salvatore CASCINO ,  Alfio GUARNERA ,  Mario Giuseppe SAGGIO

IPC: H01L29/78 ,  H01L29/94 ,  H01L29/06

CPC classification number: H01L29/7811 ,  H01L29/94 ,  H01L29/0615

Abstract: The present disclosure is directed to an electronic device including a semiconductor body having a first electrical conductivity and provided with a front side; an active area of the semiconductor body, accommodating the source and gate regions of the electronic device and configured to accommodate, in use, a conductive channel of the electronic device; and an edge region of the electronic device, surrounding the active area. The edge region accommodates at least in part: i) an edge termination region, having a second electrical conductivity opposite to the first electrical conductivity, extending into the semiconductor body at the front side; and ii) a gate connection terminal of conductive material, electrically coupled to the gate region, extending on the front side partially superimposed on the edge termination region and capacitively coupled with a portion of the semiconductor body adjacent and external to the edge termination region.

公开(公告)号：US20220262913A1

公开(公告)日：2022-08-18

申请号：US17669239

申请日：2022-02-10

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Alfio GUARNERA ,  Cateno Marco CAMALLERI

IPC: H01L29/423 ,  H01L29/43 ,  H01L29/66 ,  H01L29/16 ,  H01L29/78 ,  H01L29/40

Abstract: A vertical-conduction MOSFET device formed in a body of silicon carbide having a first and a second face and a peripheral zone. A drain region, of a first conductivity type, extends in the body between the two faces. A body region, of a second conductivity type, extends in the body from the first face, and a source region, having the first conductivity type, extends to the inside of the body region from the first face of the body. An insulated gate region extends on the first face of the body and comprises a gate conductive region. An annular connection region, of conductive material, is formed within a surface edge structure extending on the first face of the body, in the peripheral zone. The gate conductive region and the annular connection region are formed by a silicon layer and by a metal silicide layer overlying the silicon layer.

公开(公告)号：US20220208977A1

公开(公告)日：2022-06-30

申请号：US17698986

申请日：2022-03-18

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Patrick FIORENZA ,  Fabrizio ROCCAFORTE ,  Mario Giuseppe SAGGIO

IPC: H01L29/423 ,  H01L27/06 ,  H01L29/16 ,  H01L29/872

Abstract: An electronic device comprising: a semiconductor body of silicon carbide, SiC, having a first and a second face, opposite to one another along a first direction, which presents positive-charge carriers at said first face that form a positive interface charge; a first conduction terminal, which extends at the first face of the semiconductor body; a second conduction terminal, which extends on the second face of the semiconductor body; a channel region in the semiconductor body, configured to house, in use, a flow of electrons between the first conduction terminal and the second conduction terminal; and a trapping layer, of insulating material, which extends in electrical contact with the semiconductor body at said channel region and is designed so as to present electron-trapping states that generate a negative charge such as to balance, at least in part, said positive interface charge.

公开(公告)号：US20220157807A1

公开(公告)日：2022-05-19

申请号：US17591534

申请日：2022-02-02

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Mario Giuseppe SAGGIO ,  Simone RASCUNÁ

IPC: H01L27/06 ,  H01L29/872 ,  H01L29/06 ,  H01L29/10 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78 ,  H01L21/04 ,  H01L29/08 ,  H01L29/423

Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.

公开(公告)号：US20210399089A1

公开(公告)日：2021-12-23

申请号：US17346771

申请日：2021-06-14

Applicant: STMicroelectronics S.r.l.

Inventor： Mario Giuseppe SAGGIO ,  Angelo MAGRI' ,  Edoardo ZANETTI ,  Alfio GUARNERA

IPC: H01L29/06 ,  H01L29/16

Abstract: An electronic device includes a semiconductor body of silicon carbide, and a body region at a first surface of the semiconductor body. A source region is disposed in the body region. A drain region is disposed at a second surface of the semiconductor body. A doped region extends seamlessly at the entire first surface of the semiconductor body and includes one or more first sub-regions having a first doping concentration and one or more second sub-regions having a second doping concentration lower than the first doping concentration. Thus, the device has zones alternated to each other having different conduction threshold voltage and different saturation current.