公开(公告)号：US10559611B2

公开(公告)日：2020-02-11

申请号：US16031710

申请日：2018-07-10

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy ,  Philippe Are

IPC: H01L27/146 ,  H01L27/148

Abstract: An image sensor includes a control circuit and pixels. Each pixel includes: a photosensitive area, a substantially rectangular storage area adjacent to the photosensitive area, and a read area. First and second insulated vertical electrodes electrically connected to each other are positioned opposite each other and delimit the storage area. The first electrode extends between the storage area and the photosensitive area. The second electrode includes a bent extension opposite a first end of the first electrode, with the storage area emerging onto the photosensitive area on the side of the first end. The control circuit operates to apply a first voltage to the first and second electrodes to perform a charge transfer, and a second voltage to block charge transfer.

公开(公告)号：US20190280024A1

公开(公告)日：2019-09-12

申请号：US15916912

申请日：2018-03-09

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy

IPC: H01L27/146

Abstract: A semiconductor body of a first conductivity type and doped with a first doping level includes, at a front side surface thereof, a well of a second conductivity type and a region doped with the first conductivity type at a second doping level greater than the first doping level. An insulated vertical gate structure separates the region from the well. Buried iInsulated electrodes extend from the front side surface completely through the well and into a portion of the semiconductor body underneath the well. A conductive material portion of each buried insulated electrode is configured to receive a bias voltage and a conductive material portion of insulated vertical gate structure is configured to receive a gate voltage. The semiconductor body is delimited by a capacitive deep trench isolation that is biased at the same voltage as the buried insulated electrode.

公开(公告)号：US10355041B2

公开(公告)日：2019-07-16

申请号：US15703251

申请日：2017-09-13

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy

IPC: H01L27/146

Abstract: A pixel includes a semiconductor layer with a charge accumulation layer extending in the semiconductor layer. A transistor has a read region penetrating into said semiconductor layer down to a first depth. An insulating wall penetrates into the semiconductor layer from an upper surface and containing an insulated conductor connected to a node of application of a potential. The insulating wall includes at least a portion provided with a deep insulating plug penetrating into the insulated conductor down to a second depth greater than the first depth. A continuous portion of the insulating wall laterally delimits, at least partially, a charge accumulation area and includes a wall portion with the deep insulating plug at least partially laterally delimiting the read region of the transistor.

公开(公告)号：US10321073B2

公开(公告)日：2019-06-11

申请号：US15358737

申请日：2016-11-22

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy

IPC: H04N5/353 ,  H04N5/378 ,  H04N5/372 ,  H01L27/146 ,  H04N5/363

Abstract: Each pixel of a global shutter back-side illuminated image sensor includes a photosensitive area. On a front surface, a first transistor includes a vertical ring-shaped electrode penetrating into the photosensitive area and laterally delimiting a memory area. The memory area penetrates into the photosensitive area less deeply than the insulated vertical ring-shaped electrode. A read area is formed in an intermediate area which is formed in the memory area. The memory area, the intermediate area and read area define a second transistor having an insulated horizontal electrode forming a gate of the second transistor. The memory area may be formed by a first and second memory areas and an output signal is generated indicative of a difference between charge stored in the first memory area and charge stored in the second memory area after a charge transfer to the first memory area.

公开(公告)号：US20190137609A1

公开(公告)日：2019-05-09

申请号：US15805711

申请日：2017-11-07

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy

IPC: G01S7/481 ,  H01L27/146 ,  G01S17/89 ,  G01S17/42

Abstract: A sensor array includes pixel kernels, wherein each pixel kernel includes RGB pixels, the RGB pixels being configured to provide a plurality of color signals, and Z pixels each having a single memory element, the Z pixels being configured to provide a single TOF signal. Each pixel kernel includes two to four Z pixels. The RGB and Z pixels can be integrated together on a single sensor array.

公开(公告)号：US10192917B2

公开(公告)日：2019-01-29

申请号：US15198824

申请日：2016-06-30

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy ,  Bastien Mamdy

IPC: H01L27/146

Abstract: A photosensor is formed within a semiconductor substrate layer having a front side and a back side. An isolation structure delimits an active region of the semiconductor substrate layer which includes a charge collecting region. The front side of semiconductor substrate layer includes a charge transfer circuit. A reflecting mirror is mounted at the back side of the semiconductor substrate layer. The reflecting mirror includes a pupil opening configured to admit light into the active region at the back side. An underside reflective surface of the reflecting mirror is configured to reflect light received from the active region back into the active region.

公开(公告)号：US20180006072A1

公开(公告)日：2018-01-04

申请号：US15198824

申请日：2016-06-30

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy ,  Bastien Mamdy

IPC: H01L27/146

CPC classification number: H01L27/14629 ,  H01L27/14609 ,  H01L27/14612 ,  H01L27/1462 ,  H01L27/14623 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/1464

Abstract: A photosensor is formed within a semiconductor substrate layer having a front side and a back side. An isolation structure delimits an active region of the semiconductor substrate layer which includes a charge collecting region. The front side of semiconductor substrate layer includes a charge transfer circuit. A reflecting mirror is mounted at the back side of the semiconductor substrate layer. The reflecting mirror includes a pupil opening configured to admit light into the active region at the back side. An underside reflective surface of the reflecting mirror is configured to reflect light received from the active region back into the active region.

公开(公告)号：US09793312B1

公开(公告)日：2017-10-17

申请号：US15230055

申请日：2016-08-05

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy

IPC: H01L27/148 ,  H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/14603 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14638 ,  H01L27/14689

Abstract: A pixel includes a semiconductor layer with a charge accumulation layer extending in the semiconductor layer. A transistor has a read region penetrating into said semiconductor layer down to a first depth. An insulating wall penetrates into the semiconductor layer from an upper surface and containing an insulated conductor connected to a node of application of a potential. The insulating wall includes at least a portion provided with a deep insulating plug penetrating into the insulated conductor down to a second depth greater than the first depth. A continuous portion of the insulating wall laterally delimits, at least partially, a charge accumulation area and includes a wall portion with the deep insulating plug at least partially laterally delimiting the read region of the transistor.

公开(公告)号：US20170194368A1

公开(公告)日：2017-07-06

申请号：US15392032

申请日：2016-12-28

Applicant: STMicroelectronics (Crolles 2) SAS ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Francois Roy ,  Boris Rodrigues ,  Marie Guillon ,  Yvon Cazaux ,  Benoit Giffard

IPC: H01L27/146 ,  H04N5/374

CPC classification number: G01S7/4863 ,  G01S7/4914 ,  H01L27/14607 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14625 ,  H01L27/1463 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/14683 ,  H04N5/374

Abstract: A pixel is formed on a semiconductor substrate that includes a photosensitive area having a first doped layer and a charge collection area of a first conductivity type extending through at least part of the first doped layer. At least two charge storage areas, each including a well of the first conductivity type, are separated from the charge collection area at least by a first portion of the first layer. The first portion is covered by a first gate. Each charge storage area is laterally delimited by two insulated conductive electrodes. A second doped layer of the second conductivity type covers the charge collection area and the charge storage areas.

公开(公告)号：US20170192090A1

公开(公告)日：2017-07-06

申请号：US15387883

申请日：2016-12-22

Applicant: STMicroelectronics (Crolles 2) SAS ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Francois Roy ,  Marie Guillon ,  Yvon Cazaux ,  Boris Rodrigues ,  Alexis Rochas

IPC: G01S7/486 ,  H01L27/146

CPC classification number: G01S7/4863 ,  G01S7/4914 ,  H01L27/14607 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14625 ,  H01L27/1463 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/14683 ,  H04N5/374

Abstract: A time-of-flight detection pixel includes a photosensitive area including a first doped layer and a charge collection area extending in the first doped layer. At least two charge storage areas extend from the charge collection area, each including a first well more heavily doped than the charge collection area and separated from the charge collection area by a first portion of the first doped layer which is coated with a gate. Each charge storage area is laterally delimited by two insulated conductive electrodes, extending parallel to each other and facing each other. A second heavily doped layer of opposite conductivity coats the pixel except for at each portion of the first doped layer coated with the gate.