公开(公告)号：US11710776B2

公开(公告)日：2023-07-25

申请号：US17401881

申请日：2021-08-13

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis Gauthier ,  Edoardo Brezza ,  Pascal Chevalier

IPC: H01L29/66 ,  H01L21/762 ,  H01L29/08 ,  H01L29/732

CPC classification number: H01L29/6625 ,  H01L21/76224 ,  H01L29/0804 ,  H01L29/7322

Abstract: A bipolar transistor includes a stack of an emitter, a base, and a collector. The base is structured to have a comb shape including fingers oriented in a plane orthogonal to a stacking direction of the stack.

公开(公告)号：US11417756B2

公开(公告)日：2022-08-16

申请号：US17175758

申请日：2021-02-15

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Edoardo Brezza ,  Alexis Gauthier ,  Fabien Deprat ,  Pascal Chevalier

IPC: H01L29/737 ,  H01L21/8249 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66

Abstract: A method of making a bipolar transistor includes forming a stack of a first, second, third and fourth insulating layers on a substrate. An opening is formed in the stack to reach the substrate. An epitaxial process forms the collector of the transistor on the substrate and selectively etches an annular opening in the third layer. The intrinsic part of the base is then formed by epitaxy on the collector, with the intrinsic part being separated from the third layer by the annular opening. The junction between the collector and the intrinsic part of the base is surrounded by the second layer. The emitter is formed on the intrinsic part and the third layer is removed. A selective deposition of a semiconductor layer on the second layer and in direct contact with the intrinsic part forms the extrinsic part of the base.

公开(公告)号：US11355581B2

公开(公告)日：2022-06-07

申请号：US16995079

申请日：2020-08-17

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis Gauthier ,  Pascal Chevalier ,  Gregory Avenier

IPC: H01L29/06 ,  H01L21/8222 ,  H01L29/66 ,  H01L29/732

Abstract: A transistor is produced by forming a first part of a first region of the transistor in a semiconductor substrate by implanting dopants through an opening in an isolating trench formed at an upper surface of the semiconductor substrate. A second region of the transistor in the opening by epitaxy.

公开(公告)号：US10468508B2

公开(公告)日：2019-11-05

申请号：US16250182

申请日：2019-01-17

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis Gauthier ,  Pascal Chevalier ,  Gregory Avenier

IPC: H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L29/732 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/10 ,  H01L21/3105 ,  H01L29/737

Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector contact region. A first epitaxial region forms a collector region of a first conductivity type on the collector contact region. A second epitaxial region forms a base region of a second conductivity type. Deposited semiconductor material forms an emitter region of the first conductivity type. The collector region, base region and emitter region are located within an opening formed in a stack of insulating layers that includes a sacrificial layer. The sacrificial layer is selectively removed to expose a side wall of the base region. Epitaxial growth from the exposed sidewall forms a base contact region.

公开(公告)号：US20180108762A1

公开(公告)日：2018-04-19

申请号：US15840890

申请日：2017-12-13

Applicant: STMicroelectronics SA

Inventor： Pascal Chevalier

IPC: H01L29/732 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08 ,  H01L21/308 ,  H01L29/737

CPC classification number: H01L29/732 ,  H01L21/308 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/7371

Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector contact region. A first epitaxial region forms a collector region of a first conductivity type on the collector contact region. A second epitaxial region forms a base region of a second conductivity type. Deposited semiconductor material forms an emitter region of the first conductivity type. The collector region, base region and emitter region are located within an opening having sidewalls lined with an insulating sheath. A portion of the insulating sheath adjacent the base region is removed and a base contact region is formed by epitaxial material grown from a portion of the base region exposed by removal of the portion of the insulating sheath.

公开(公告)号：US10374069B2

公开(公告)日：2019-08-06

申请号：US15840890

申请日：2017-12-13

Applicant: STMicroelectronics SA

Inventor： Pascal Chevalier

IPC: H01L29/08 ,  H01L29/10 ,  H01L29/66 ,  H01L21/308 ,  H01L29/732 ,  H01L29/737

Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector contact region. A first epitaxial region forms a collector region of a first conductivity type on the collector contact region. A second epitaxial region forms a base region of a second conductivity type. Deposited semiconductor material forms an emitter region of the first conductivity type. The collector region, base region and emitter region are located within an opening having sidewalls lined with an insulating sheath. A portion of the insulating sheath adjacent the base region is removed and a base contact region is formed by epitaxial material grown from a portion of the base region exposed by removal of the portion of the insulating sheath.

公开(公告)号：US20160099334A1

公开(公告)日：2016-04-07

申请号：US14970341

申请日：2015-12-15

Applicant: STMicroelectronics SA

Inventor： Alain Chantre ,  Pascal Chevalier ,  Gregory Avenier

IPC: H01L29/66 ,  H01L21/8249

CPC classification number: H01L29/66272 ,  H01L21/8249 ,  H01L27/1203 ,  H01L29/1004 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66265 ,  H01L29/73 ,  H01L29/7317 ,  H01L29/7322 ,  H01L29/7371

Abstract: A method for manufacturing a bipolar transistor, including the steps of: forming a first surface-doped region of a semiconductor substrate having a semiconductor layer extending thereon with an interposed first insulating layer; forming, at the surface of the device, a stack of a silicon layer and of a second insulating layer; defining a trench crossing the stack and the semiconductor layer opposite to the first doped region, and then an opening in the exposed region of the first insulating layer; forming a single-crystal silicon region in the opening; forming a silicon-germanium region at the surface of single-crystal silicon region, in contact with the remaining regions of the semiconductor layer and of the silicon layer; and forming a second doped region at least in the remaining space of the trench.

公开(公告)号：US20130270649A1

公开(公告)日：2013-10-17

申请号：US13859341

申请日：2013-04-09

Applicant: STMICROELECTRONICS SA

Inventor： Alain Chantre ,  Pascal Chevalier ,  Gregory Avenier

IPC: H01L29/73 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/66272 ,  H01L21/8249 ,  H01L27/1203 ,  H01L29/1004 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66265 ,  H01L29/73 ,  H01L29/7317 ,  H01L29/7322 ,  H01L29/7371

Abstract: A method for manufacturing a bipolar transistor, including the steps of: forming a first surface-doped region of a semiconductor substrate having a semiconductor layer extending thereon with an interposed first insulating layer; forming, at the surface of the device, a stack of a silicon layer and of a second insulating layer; defining a trench crossing the stack and the semiconductor layer opposite to the first doped region, and then an opening in the exposed region of the first insulating layer; forming a single-crystal silicon region in the opening; forming a silicon-germanium region at the surface of single-crystal silicon region, in contact with the remaining regions of the semiconductor layer and of the silicon layer; and forming a second doped region at least in the remaining space of the trench.

Abstract translation: 一种制造双极晶体管的方法，包括以下步骤：形成半导体衬底的第一表面掺杂区，其半导体层在其上延伸有第一绝缘层; 在所述器件的表面处形成硅层和第二绝缘层的堆叠; 限定与所述堆叠交叉的沟槽和与所述第一掺杂区域相对的所述半导体层，以及所述第一绝缘层的所述暴露区域中的开口; 在开口中形成单晶硅区域; 在与所述半导体层和所述硅层的剩余区域接触的单晶硅区域的表面上形成硅 - 锗区域; 以及至少在所述沟槽的剩余空间中形成第二掺杂区域。

公开(公告)号：US09882034B2

公开(公告)日：2018-01-30

申请号：US15221051

申请日：2016-07-27

Applicant: STMicroelectronics SA

Inventor： Pascal Chevalier

IPC: H01L29/732 ,  H01L21/308 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66 ,  H01L29/737

CPC classification number: H01L29/732 ,  H01L21/308 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/7371

Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector contact region. A first epitaxial region forms a collector region of a first conductivity type on the collector contact region. A second epitaxial region forms a base region of a second conductivity type. Deposited semiconductor material forms an emitter region of the first conductivity type. The collector region, base region and emitter region are located within an opening having sidewalls lined with an insulating sheath. A portion of the insulating sheath adjacent the base region is removed and a base contact region is formed by epitaxial material grown from a portion of the base region exposed by removal of the portion of the insulating sheath.

公开(公告)号：US20170236923A1

公开(公告)日：2017-08-17

申请号：US15221051

申请日：2016-07-27

Applicant: STMicroelectronics SA

Inventor： Pascal Chevalier

IPC: H01L29/732 ,  H01L29/66 ,  H01L21/308 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/732 ,  H01L21/308 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/7371

Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector contact region. A first epitaxial region forms a collector region of a first conductivity type on the collector contact region. A second epitaxial region forms a base region of a second conductivity type. Deposited semiconductor material forms an emitter region of the first conductivity type. The collector region, base region and emitter region are located within an opening having sidewalls lined with an insulating sheath. A portion of the insulating sheath adjacent the base region is removed and a base contact region is formed by epitaxial material grown from a portion of the base region exposed by removal of the portion of the insulating sheath.