公开(公告)号：US20220149844A1

公开(公告)日：2022-05-12

申请号：US17450711

申请日：2021-10-13

Applicant: STMicroelectronics S.r.l.

Inventor： Liliana Arcidiacono ,  Alessandro Nicolosi ,  Valeria Bottarel

IPC: H03K19/17736 ,  H03K19/08

Abstract: A circuit receives an input signal having a first level and a second level. A logic circuit includes a finite state machine circuit, an edge detector circuit, and a timer circuit. The finite state machine circuit is configured to set a mode of operation of the circuit. The edge detector circuit is configured to detect a transition between the first and second level. The timer circuit is configured to determine whether the first or second level is maintained over an interval, which starts from a transition detected by the edge detector circuit. The finite state machine circuit is configured to change the mode of operation based on the timer circuit determining that the first or second level has been maintained over the interval.

公开(公告)号：US09966944B2

公开(公告)日：2018-05-08

申请号：US15216271

申请日：2016-07-21

Applicant: STMicroelectronics S.R.L.

Inventor： Sandro Rossi ,  Valeria Bottarel

IPC: H03K3/00 ,  H03K17/687 ,  H03K19/0175

CPC classification number: H03K17/687 ,  H03K3/3565 ,  H03K17/04123 ,  H03K17/063 ,  H03K17/6872 ,  H03K19/017509 ,  H03K19/018521 ,  H03K2217/0036 ,  H03K2217/0045

Abstract: A gate driver circuit for a half bridge or full bridge output driver stage having a high side branch connected to one or more high side transistors and a low side branch connected to one or more low side transistors. A high side gate driver and a low side gate driver receive input signals at a low voltage level and output signals at a high voltage level as gate driving signals for the high side transistors and low side transistors. Each of the high side and the low side branches of the gate driver includes a set-reset latch having a signal output that is fed as a gate signal to the corresponding transistor of the half bridge or full bridge driver. A differential capacitive level shifter circuit receives the input signals at a low voltage level and outputs high voltage signals to drive the set and reset inputs of the set-reset latch.

公开(公告)号：US09450434B2

公开(公告)日：2016-09-20

申请号：US14181270

申请日：2014-02-14

Applicant: STMicroelectronics S.r.l.

Inventor： Valeria Bottarel ,  Giulio Ricotti

IPC: H02J7/00 ,  H01M10/44 ,  H01M10/46 ,  H02J7/32 ,  H02M1/36 ,  H02M1/00

CPC classification number: H02J7/0052 ,  H02J7/32 ,  H02M1/36 ,  H02M2001/0032 ,  Y02B70/16

Abstract: An energy-harvesting system includes a transducer to convert environmental energy into a harvesting electrical signal. A storage element stores electrical energy derived from conversion of the harvested environmental energy. A harvesting interface supplies an electrical charging signal to the storage element. The harvesting interface is selectively connected to the storage element in response to a control signal. The control signal causes the connection when the harvesting electrical signal exceeds a threshold. Conversely, the control signal causes the disconnection when the harvesting electrical signal is less than the threshold.

Abstract translation: 能量收集系统包括将环境能量转换成收获电信号的换能器。 存储元件存储从收获的环境能量的转化得到的电能。 收割界面向存储元件提供充电信号。 响应于控制信号，收获界面选择性地连接到存储元件。 当采集电信号超过阈值时，控制信号导致连接。 相反，当采集电信号小于阈值时，控制信号导致断开。