公开(公告)号：US20200185038A1

公开(公告)日：2020-06-11

申请号：US16788638

申请日：2020-02-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Wan Nam ,  Dong-Hun Kwak ,  Chi-Weon Yoon

IPC: G11C16/16 ,  G11C16/04 ,  H01L27/11582 ,  H01L27/11573

Abstract: A method of operating a nonvolatile memory device includes erasing data within a NAND string of memory cells within the memory device by applying a non-zero erase voltage to a source/drain terminal at a first end of the NAND string. This erase voltage is applied concurrently with establishing gate-induced drain leakage (GIDL) in a pair of selection transistors within the NAND string. This GIDL can occur by applying unequal and non-zero first and second voltages to respective first and second gate terminals of the pair of selection transistors. The selection transistors can be string selection transistors or ground selection transistors.

公开(公告)号：US10672454B2

公开(公告)日：2020-06-02

申请号：US16675331

申请日：2019-11-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Hun Kwak ,  Hee-Woong Kang ,  Jun-Ho Seo ,  Hee-Won Lee

IPC: G11C7/12 ,  G11C11/4074 ,  G11C7/10 ,  G11C8/12 ,  G11C16/08 ,  G11C11/408 ,  G11C11/4097 ,  G11C11/56 ,  G11C16/04 ,  G11C16/06 ,  G11C16/10 ,  G11C16/30 ,  G11C16/34

Abstract: A nonvolatile memory device includes a memory cell array, a voltage generator, a page buffer circuit, a row decoder and a control circuit. The memory cell array includes a plurality of mats corresponding to different bit-lines. The voltage generator generates word-line voltages applied to the memory cell array. The page buffer circuit is coupled to the memory cell array through bit-lines. The row decoder is coupled to the memory cell array through word-lines, and the row decoder transfers the word-line voltages to the memory cell array. The control circuit controls the voltage generator, the row decoder and the page buffer circuit based on a command and an address. The control circuit selects a voltage between different voltages to apply the selected different voltages to at least one of the word-lines or at least one of the bit-lines according to a number of mats of the plurality mats, which operate simultaneously.

公开(公告)号：US10600487B2

公开(公告)日：2020-03-24

申请号：US16205334

申请日：2018-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Wan Nam ,  Dong-Hun Kwak ,  Chi-Weon Yoon

IPC: G11C16/04 ,  G11C16/16 ,  G11C8/12 ,  H01L27/11573 ,  H01L27/11582 ,  G11C16/14

Abstract: A method of operating a nonvolatile memory device includes erasing data within a NAND string of memory cells within the memory device by applying a non-zero erase voltage to a source/drain terminal at a first end of the NAND string. This erase voltage is applied concurrently with establishing gate-induced drain leakage (GIDL) in a pair of selection transistors within the NAND string. This GIDL can occur by applying unequal and non-zero first and second voltages to respective first and second gate terminals of the pair of selection transistors. The selection transistors can be string selection transistors or ground selection transistors.

公开(公告)号：US10431314B2

公开(公告)日：2019-10-01

申请号：US15996485

申请日：2018-06-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung-Bum Kim ,  Deok-Woo Lee ,  Dong-Hun Kwak

IPC: G11C16/04 ,  G11C16/34 ,  G11C11/56 ,  G11C16/30 ,  G11C16/14 ,  G11C16/10 ,  H01L27/11582 ,  H01L27/1157

Abstract: A non-volatile memory device includes multiple word lines, and a voltage generator. Some of the word lines correspond to a deterioration area. The voltage generator is configured to generate a program voltage provided to multiple memory cells through the word lines. Control logic implemented by the non-volatile memory device is configured to control a program operation and an erase operation on the word lines. The deterioration area includes word lines of a first group and word lines of a second group. The control logic is configured to control a program sequence so that each of the word lines of the second group is programmed after an adjacent word line of the first group is programmed, and to control a distribution so that a threshold voltage level corresponding to an erase state of each of the word lines of the first group is higher than a threshold voltage level corresponding to an erase state of each of the word lines of the second group.