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    NON-VOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME
    1.
    发明申请
    NON-VOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME 有权

    公开(公告)号：US20220157388A1

    公开(公告)日：2022-05-19

    申请号：US17665049

    申请日：2022-02-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Dong-Hun Kwak

    IPC: G11C16/26 ,  G11C16/08 ,  G11C16/10 ,  G11C16/34 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L27/11556 ,  H01L27/11582 ,  G11C16/04

    Abstract: A method of operating a non-volatile memory device includes performing a first sensing operation on the non-volatile memory device during a first sensing time including a first section, a second section, and a third section. The performing of the first sensing operation includes applying a first voltage level, which is variable according to a first target voltage level, to a selected word line in the first section, applying a second voltage level, which is different from the first voltage level, to the selected word line in the second section, and applying the first target voltage level, which is different from the second voltage level, to the selected word line in the third section. The first voltage level becomes greater as the first target voltage level becomes greater.

    Non-volatile memory device and method of operating the same
    2.
    发明授权
    Non-volatile memory device and method of operating the same 有权

    公开(公告)号：US11217314B2

    公开(公告)日：2022-01-04

    申请号：US16547416

    申请日：2019-08-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Dong-Hun Kwak

    IPC: G11C16/26 ,  G11C16/34 ,  G11C11/56 ,  G11C16/32 ,  G11C16/04 ,  H01L27/11582

    Abstract: A method of operating a non-volatile memory device includes performing a first sensing operation on the non-volatile memory device during a first sensing time including a first section, a second section, and a third section. The performing of the first sensing operation includes applying a first voltage level, which is variable according to a first target voltage level, to a selected word line in the first section, applying a second voltage level, which is different from the first voltage level, to the selected word line in the second section, and applying the first target voltage level, which is different from the second voltage level, to the selected word line in the third section. The first voltage level becomes greater as the first target voltage level becomes greater.

    Nonvolatile memory devices
    3.
    发明授权
    Nonvolatile memory devices 有权

    公开(公告)号：US12300302B2

    公开(公告)日：2025-05-13

    申请号：US18581018

    申请日：2024-02-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hee-Woong Kang ,  Dong-Hun Kwak ,  Jun-Ho Seo ,  Hee-Won Lee

    IPC: G11C16/34 ,  G11C7/10 ,  G11C7/12 ,  G11C8/12 ,  G11C11/4074 ,  G11C11/408 ,  G11C11/4097 ,  G11C11/56 ,  G11C16/04 ,  G11C16/06 ,  G11C16/08 ,  G11C16/10 ,  G11C16/30

    Abstract: A nonvolatile memory device includes a memory cell array and a row decoder. The memory cell array includes a plurality of mats. A first cell string of first mat is connected to a plurality of first word-lines, a first bit-line and a first string selection line. A second cell string of second mat is connected to a plurality of second word-lines, a second bit-line and a second string selection line. Each of the first and second cell strings includes a ground selection transistor, memory cells, and a string selection transistor coupled in series. The row decoder applies a first voltage to a third word-line among the plurality of first and second word-lines for a first period of time in a single mat mode and to apply a second voltage to the third word-line for a second period of time longer than the first period of time in a multi-mat mode.

    Non-volatile memory device and method of operating the same
    5.
    发明授权
    Non-volatile memory device and method of operating the same 有权

    公开(公告)号：US11594286B2

    公开(公告)日：2023-02-28

    申请号：US17665049

    申请日：2022-02-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Dong-Hun Kwak

    IPC: G11C16/04 ,  G11C16/26 ,  G11C16/08 ,  G11C16/10 ,  G11C16/34 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L27/11556 ,  H01L27/11582

    Abstract: A method of operating a non-volatile memory device includes performing a first sensing operation on the non-volatile memory device during a first sensing time including a first section, a second section, and a third section. The performing of the first sensing operation includes applying a first voltage level, which is variable according to a first target voltage level, to a selected word line in the first section, applying a second voltage level, which is different from the first voltage level, to the selected word line in the second section, and applying the first target voltage level, which is different from the second voltage level, to the selected word line in the third section. The first voltage level becomes greater as the first target voltage level becomes greater.

    Nonvolatile memory devices
    8.
    发明授权
    Nonvolatile memory devices 有权

    公开(公告)号：US11462260B2

    公开(公告)日：2022-10-04

    申请号：US17321393

    申请日：2021-05-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hee-Woong Kang ,  Dong-Hun Kwak ,  Jun-Ho Seo ,  Hee-Won Lee

    IPC: G11C7/10 ,  G11C11/4074 ,  G11C8/12 ,  G11C16/08 ,  G11C11/408 ,  G11C11/4097 ,  G11C11/56 ,  G11C16/04 ,  G11C16/06 ,  G11C16/10 ,  G11C16/30 ,  G11C16/34 ,  G11C7/12

    Abstract: A nonvolatile memory device includes a memory cell array and a row decoder. The memory cell array includes a plurality of mats. A first cell string of first mat is connected to a plurality of first word-lines, a first bit-line and a first string selection line. A second cell string of second mat is connected to a plurality of second word-lines, a second bit-line and a second string selection line. Each of the first and second cell strings includes a ground selection transistor, memory cells, and a string selection transistor coupled in series. The row decoder applies a first voltage to a third word-line among the plurality of first and second word-lines for a first period of time in a single mat mode and to apply a second voltage to the third word-line for a second period of time longer than the first period of time in a multi-mat mode.

    Nonvolatile memory devices and memory systems
    9.
    发明授权
    Nonvolatile memory devices and memory systems 有权

    公开(公告)号：US10153029B2

    公开(公告)日：2018-12-11

    申请号：US15604406

    申请日：2017-05-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dong-Hun Kwak ,  Hee-Woong Kang ,  Jun-Ho Seo ,  Hee-Won Lee

    IPC: G11C7/12 ,  G11C11/4074 ,  G11C11/408 ,  G11C11/4097 ,  G11C11/56 ,  G11C16/04 ,  G11C16/06 ,  G11C16/10 ,  G11C16/30 ,  G11C16/34 ,  G11C7/10 ,  G11C8/12 ,  G11C16/08

    Abstract: A nonvolatile memory device includes a memory cell array, a voltage generator, a page buffer circuit, a row decoder and a control circuit. The memory cell array includes a plurality of mats corresponding to different bit-lines. The voltage generator generates word-line voltages applied to the memory cell array. The page buffer circuit is coupled to the memory cell array through bit-lines. The row decoder is coupled to the memory cell array through word-lines, and the row decoder transfers the word-line voltages to the memory cell array. The control circuit controls the voltage generator, the row decoder and the page buffer circuit based on a command and an address. The control circuit selects a voltage between different voltages to apply the selected different voltages to at least one of the word-lines or at least one of the bit-lines according to a number of mats of the plurality mats, which operate simultaneously.

    Nonvolatile memory device and method of controlling suspension of command execution of the same
    10.
    发明授权
    Nonvolatile memory device and method of controlling suspension of command execution of the same 有权

    公开(公告)号：US09928165B2

    公开(公告)日：2018-03-27

    申请号：US13919028

    申请日：2013-06-17

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dong-Hun Kwak

    IPC: G06F12/02 ,  G11C16/00 ,  G11C16/10 ,  G11C16/24

    CPC classification number: G06F12/0246 ,  G11C16/00 ,  G11C16/10 ,  G11C16/24

    Abstract: A nonvolatile memory device includes a memory cell array, a row decoder, a page buffer, and control logic. The memory cell array includes memory cells connected to word lines and bit lines, the memory cell array being configured to store data. The row decoder is configured to selectively activate a string selection line, a ground selection line, and the word lines of the memory cell array. The page buffer is configured to temporarily store external data and to apply a predetermined voltage to the bit lines according to the stored data during a program operation, and to sense data stored in selected memory cells using the bit lines during a read operation or a verification operation. The control logic is configured to control the row decoder and the page buffer. During execution of commands, when a request to suspend the execution of the commands is retrieved, chip information is backed up to a storage space separate from the control logic.

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