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    Semiconductor device and fabricating method thereof
    23.
    发明授权
    Semiconductor device and fabricating method thereof 有权
    半导体器件及其制造方法

    公开(公告)号：US09418896B2

    公开(公告)日：2016-08-16

    申请号：US14539579

    申请日：2014-11-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyun-Jae Kang ,  Jin-Wook Lee ,  Kang-Ill Seo ,  Yong-Min Cho

    IPC: H01L21/336 ,  H01L21/8234 ,  H01L21/3213

    CPC classification number: H01L27/0886 ,  G03F7/70 ,  H01L21/0274 ,  H01L21/32136 ,  H01L21/32139 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823475 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53271 ,  H01L27/0207

    Abstract: Provided are a semiconductor device and a fabricating method thereof. The fabricating method includes forming first to fourth fins, each extending in a first direction, to be spaced apart in a second direction intersecting the first direction, forming first and second gate lines, each extending in the second direction, on the first to fourth fins to be spaced apart in the first direction, forming a first contact on the first gate line between the first and second fins, forming a second contact on the first gate line between the third and fourth fins, forming a third contact on the second gate line between the first and second fins, forming a fourth contact on the second gate line between the third and fourth fins and forming a fifth contact on the first to fourth contacts so as to overlap with the second contact and the third contact and so as not to overlap with the first contact and the fourth contact, wherein the fifth contact is arranged to diagonally traverse a quadrangle defined by the first to fourth contacts.

    Abstract translation: 提供一种半导体器件及其制造方法。 制造方法包括：形成第一至第四鳍片，每个翼片沿第一方向延伸，沿与第一方向相交的第二方向间隔开，形成第一和第二栅极线，每个沿第二方向延伸，第一至第四鳍片 在所述第一方向上间隔开，在所述第一和第二鳍之间的所述第一栅极线上形成第一接触，在所述第三和第四鳍之间的所述第一栅极线上形成第二接触，在所述第二栅极线上形成第三接触 在第一和第二散热片之间，在第三和第四鳍之间的第二栅极线上形成第四触点，并在第一至第四触点上形成第五触点，以便与第二触点和第三触点重叠， 与第一触点和第四触点重叠，其中第五触点布置成对角地横过由第一至第四触点限定的四边形。

    FinFET-based semiconductor device with dummy gates
    25.
    发明授权
    FinFET-based semiconductor device with dummy gates 有权
    具有虚拟栅极的FinFET半导体器件

    公开(公告)号：US09209179B2

    公开(公告)日：2015-12-08

    申请号：US14253439

    申请日：2014-04-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jin-Wook Lee ,  Kang-Ill Seo

    IPC: H01L27/088 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66

    CPC classification number: H01L27/0886 ,  H01L29/0692 ,  H01L29/66795 ,  H01L29/7855 ,  H01L29/7856

    Abstract: A semiconductor device is provided. A substrate includes first and second active fins disposed in a row along a first direction. The first and second active fins are spaced apart from each other. A first dummy gate and a second dummy gate are disposed on the substrate and are extended in a second direction intersecting the first direction. The first dummy gate covers an end portion of the first active fin. The second dummy gate covers an end portion of the second active fin facing the end portion of the first active fin. A first dummy spacer is disposed on a sidewall of the first dummy gate. A second dummy spacer is disposed on a sidewall of the second dummy gate. The sidewall of the second dummy gate faces the sidewall of the first dummy gate. The first dummy spacer is in contact with the second dummy spacer.

    Abstract translation: 提供半导体器件。 衬底包括沿着第一方向排成一排的第一和第二活性鳍。 第一和第二活动翅片彼此间隔开。 第一伪栅极和第二伪栅极设置在基板上并沿与第一方向相交的第二方向延伸。 第一伪栅极覆盖第一有源鳍片的端部。 第二伪栅极覆盖面向第一有源鳍片的端部的第二有源鳍片的端部。 第一虚拟间隔物设置在第一伪栅极的侧壁上。 第二虚拟间隔物设置在第二虚拟栅极的侧壁上。 第二伪栅极的侧壁面向第一虚拟栅极的侧壁。 第一假间隔件与第二假间隔件接触。

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