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公开(公告)号:US20210151595A1
公开(公告)日:2021-05-20
申请号:US15931969
申请日:2020-05-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younghwan PARK , Jongseob KIM
IPC: H01L29/778 , H01L29/205 , H01L29/20 , H01L29/78 , H01L29/66 , H01L29/06
Abstract: A semiconductor structure includes a substrate; at least one mask layer spaced apart from the substrate in a first direction; a first semiconductor region of a first conductivity type between the substrate and the at least one mask layer; a second semiconductor region of a second conductivity type on the at least one mask layer; and a third semiconductor region of the first conductivity type on the first semiconductor region. The third semiconductor region may contact the second semiconductor region to form a PN-junction structure in a second direction different from the first direction. The semiconductor structure may be applied to vertical power devices and may be capable of increasing withstand voltage performance and lowering an on-resistance.
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公开(公告)号:US20210118814A1
公开(公告)日:2021-04-22
申请号:US16868745
申请日:2020-05-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younghwan PARK , Jongseob KIM , Joonyong KIM , Junhyuk PARK , Dongchul SHIN , Jaejoon OH , Soogine CHONG , Sunkyu HWANG , Injun HWANG
IPC: H01L23/00 , H01L29/20 , H01L29/205 , H01L29/778 , H01L29/15
Abstract: A semiconductor thin film structure may include a substrate, a buffer layer on the substrate, and a semiconductor layer on the buffer layer, such that the buffer layer is between the semiconductor layer and the substrate. The buffer layer may include a plurality of unit layers. Each unit layer of the plurality of unit layers may include a first layer having first bandgap energy and a first thickness, a second layer having second bandgap energy and a second thickness, and a third layer having third bandgap energy and a third thickness. One layer having a lowest bandgap energy of the first, second, and third layers of the unit layer may be between another two layers of the first, second, and third layers of the unit layer.
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公开(公告)号:US20250169098A1
公开(公告)日:2025-05-22
申请号:US18680609
申请日:2024-05-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junhyuk PARK , Jongseob KIM , Joonyong KIM , Seong Seok YANG , Jaejoon OH
IPC: H01L29/778 , H01L29/20 , H01L29/423 , H01L29/66
Abstract: A semiconductor device according to an embodiment includes a channel layer; a barrier layer above the channel layer and including a material having a different energy band gap than the channel layer; a gate electrode above the barrier layer; a gate semiconductor layer between the barrier layer and the gate electrode; a source electrode and a drain electrode on respective sides of the gate electrode and on respective sides of the channel layer and the barrier layer; a field dispersion layer connected to the source electrode and on the gate electrode; and a protection layer between barrier layer and the field dispersion layer, wherein the protection layer includes a first protection layer above the barrier layer and including silicon oxide, and a second protection layer positioned above the first protection layer and including silicon oxynitride.
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公开(公告)号:US20250098201A1
公开(公告)日:2025-03-20
申请号:US18961728
申请日:2024-11-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junhyuk PARK , Sunkyu HWANG , Jongseob KIM , Joonyong KIM , Woochul JEON
IPC: H01L29/778 , H01L21/02 , H01L23/29 , H01L23/31 , H01L29/20 , H01L29/205 , H01L29/66
Abstract: The present disclosure provides a high electron mobility transistor including a channel layer; a barrier layer on the channel layer and configured to induce formation of a 2-dimensional electron gas (2DEG) to the channel layer; a p-type semiconductor layer on the barrier layer; a first passivation layer on the barrier layer and including a quaternary material of Al, Ga, O, and N; a gate electrode on the p-type semiconductor layer; and a source electrode and a drain electrode provided on both sides of the barrier layer and separated from the gate electrode.
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公开(公告)号:US20250089326A1
公开(公告)日:2025-03-13
申请号:US18960198
申请日:2024-11-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunkyu HWANG , Jongseob KIM
IPC: H01L29/40 , H01L29/20 , H01L29/66 , H01L29/778
Abstract: A method of manufacturing a power semiconductor device includes forming a channel separation pattern on a substrate; forming a passivation layer on the substrate and the channel separation pattern; forming a gate hole, a source hole, and a drain hole penetrating the passivation layer in a same process step; and simultaneously forming a gate electrode pattern, a source electrode pattern, and a drain electrode pattern. The gate electrode pattern may be formed on the channel separation pattern. A side surface of the gate electrode pattern and a side surface of the channel separation pattern may have a step difference.
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公开(公告)号:US20240258419A1
公开(公告)日:2024-08-01
申请号:US18635617
申请日:2024-04-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Joonyong KIM , Sunkyu HWANG , Jongseob KIM , Junhyuk PARK
IPC: H01L29/778 , H01L29/20 , H01L29/40 , H01L29/66
CPC classification number: H01L29/7786 , H01L29/2003 , H01L29/404 , H01L29/407 , H01L29/66462
Abstract: Provided are a power device and a method of manufacturing the same. The power device may include a channel layer; a source and a drain at respective sides of the channel layer; a gate on the channel layer between the source and the drain; a passivation layer covering the source, the drain, and the gate; and a plurality of field plates in the passivation layer. The plurality of field plates may have different thicknesses. The plurality of field plates may have different widths, different pattern shapes, or both different widths and different pattern shapes.
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公开(公告)号:US20240258398A1
公开(公告)日:2024-08-01
申请号:US18381945
申请日:2023-10-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junhyuk PARK , Jaejoon OH , Injun HWANG , Boram KIM , Jongseob KIM , Joonyong KIM
IPC: H01L29/47 , H01L29/20 , H01L29/40 , H01L29/66 , H01L29/778
CPC classification number: H01L29/475 , H01L29/2003 , H01L29/401 , H01L29/66462 , H01L29/7786
Abstract: A high electron mobility transistor (HEMT) includes a substrate, a channel layer on the substrate, a barrier layer on the channel layer, a p-type gallium nitride (GaN) layer on the barrier layer, an n-type interfacial layer on the p-type GaN layer, and a gate electrode on the n-type interfacial layer.
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公开(公告)号:US20240243177A1
公开(公告)日:2024-07-18
申请号:US18347223
申请日:2023-07-05
Applicant: Samsung Electronics Co., Ltd.
Inventor: Joonyong KIM , Jaejoon OH , Boram KIM , Jongseob KIM , Junhyuk PARK , Sunkyu HWANG , Injun HWANG
IPC: H01L29/20 , H01L29/417 , H01L29/66 , H01L29/778
CPC classification number: H01L29/2003 , H01L29/41766 , H01L29/66462 , H01L29/7786
Abstract: A method of manufacturing a semiconductor device according to various example embodiments includes forming a buffer layer and a first semiconductor layer on a substrate, forming a recess by etching the first semiconductor layer, sequentially forming a second semiconductor layer and a third semiconductor layer on the first semiconductor layer in which the recess is formed, and forming a source and a drain respectively in contact with both sides of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer.
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公开(公告)号:US20230006047A1
公开(公告)日:2023-01-05
申请号:US17541735
申请日:2021-12-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Woochul JEON , Jongseob KIM , Jaejoon OH , Younghwan PARK
IPC: H01L29/423 , H01L27/098 , H01L29/808
Abstract: A nitride semiconductor device having a field effect gate is disclosed. The disclosed nitride semiconductor device includes a high-resistance material layer including a Group III-V compound semiconductor, a first channel control layer on the high-resistance material layer and including a Group III-V compound semiconductor of a first conductivity type, a channel layer on the channel layer control layer and including a nitride semiconductor of a second conductivity type opposite to the first conductivity type, and a gate electrode having a contact of an ohmic contact type with the first channel control layer.
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公开(公告)号:US20220393029A1
公开(公告)日:2022-12-08
申请号:US17517987
申请日:2021-11-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Woochul JEON , Jaejoon OH , Sunkyu HWANG , Jongseob KIM , Soogine CHONG
IPC: H01L29/78 , H01L27/088 , H01L29/20
Abstract: A semiconductor device includes: a semiconductor substrate including a first surface and a second surface facing each other and including a first semiconductor material; a plurality of fin structures upwardly extending on the first surface of the semiconductor substrate, spaced apart from each other by a plurality of trenches, and including the first semiconductor material as the semiconductor substrate; an insulating layer on the first surface of the semiconductor substrate filling at least a portion of the plurality of trenches; a gate electrode layer between the plurality of fin structures and surrounded by the insulating layer; a first conductive layer covering the plurality of fin structures; a second conductive layer on the second surface of the semiconductor substrate; and a shield layer between the gate electrode layer and the semiconductor substrate, surrounded by the insulating layer, and electrically connected to the second conductive layer.
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