公开(公告)号：US20240113184A1

公开(公告)日：2024-04-04

申请号：US18193859

申请日：2023-03-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junhyuk PARK ,  Jaejoon OH ,  Sunkyu HWANG ,  Boram KIM ,  Jongseob KIM ,  Joonyong KIM ,  Injun HWANG

IPC: H01L29/423 ,  H01L29/20 ,  H01L29/40 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L29/42316 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/66462 ,  H01L29/7786

Abstract: A semiconductor device may include a barrier layer on a channel layer, a gate electrode on the barrier layer, a gate semiconductor layer between the barrier layer and the gate electrode, and a source and a drain spaced apart from each other on the channel layer. The barrier layer may have a greater energy band gap than the channel layer. The gate semiconductor layer may include a first surface contacting the barrier layer and a second surface contacting the gate electrode, and a sidewall connecting the first surface with the second surface. An area of the second surface of the gate semiconductor layer may be narrower than an area of the first surface. The sidewall of the gate semiconductor layer may include a plurality of surfaces having different slopes.

公开(公告)号：US20230307534A1

公开(公告)日：2023-09-28

申请号：US17900183

申请日：2022-08-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Injun HWANG

IPC: H01L29/778 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L29/402 ,  H01L29/66462 ,  H01L29/401

Abstract: A power device and a method of manufacturing the power device is disclosed. The disclosed power device includes a channel layer, a source electrode and a drain electrode provided on both sides of the channel layer, a gate electrode provided over the channel layer between the source electrode and the drain electrode, at least one first field plate extending from above the gate electrode toward the drain electrode and including a metal, and a high-k dielectric layer provided on at least one of a lower surface and a side surface of the at least one first field plate.

公开(公告)号：US20220013659A1

公开(公告)日：2022-01-13

申请号：US17082478

申请日：2020-10-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Injun HWANG ,  Jaejoon OH ,  Soogine CHONG ,  Jongseob KIM ,  Joonyong KIM ,  Junhyuk PARK ,  Sunkyu HWANG

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/40 ,  H01L29/66

Abstract: A high electron mobility transistor (HEMT) includes a channel layer comprising a group III-V compound semiconductor; a barrier layer comprising the group III-V compound semiconductor on the channel layer; a gate electrode on the barrier layer; a source electrode over gate electrode; a drain electrode spaced apart from the source electrode; and a metal wiring layer. A same layer of the metal wiring layer includes a gate wiring connected to the gate electrode, a source field plate connected to the source electrode, and a drain field plate connected to the drain electrode.

公开(公告)号：US20230343830A1

公开(公告)日：2023-10-26

申请号：US18306341

申请日：2023-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Boram KIM ,  Jongseob KIM ,  Woochul JEON ,  Joonyong KIM ,  Junhyuk PARK ,  Jaejoon OH ,  Sunkyu HWANG ,  Injun HWANG

IPC: H01L29/15 ,  H01L29/20 ,  H01L29/207 ,  H01L29/778

CPC classification number: H01L29/157 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/7786

Abstract: Provided are a nitride semiconductor buffer structure and a semiconductor device including the same. The buffer structure may include a plurality of buffer layers between a substrate and an active layer. The active layer may include a nitride semiconductor. The plurality of buffer layers may be stacked on each other on the substrate. Each of the plurality of buffer layers may have a super lattice structure and may include a doped nitride semiconductor. The plurality of buffer layers may have different compositions from each other. Adjacent buffer layers, among the plurality of buffer layers, may have different doping concentrations from each other.

公开(公告)号：US20220310833A1

公开(公告)日：2022-09-29

申请号：US17386729

申请日：2021-07-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongchul SHIN ,  Boram KIM ,  Younghwan PARK ,  Jongseob KIM ,  Joonyong KIM ,  Junhyuk PARK ,  Jaejoon OH ,  Minchul YU ,  Soogine CHONG ,  Sunkyu HWANG ,  Injun HWANG

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/205

Abstract: A high electron mobility transistor (HEMT) includes a channel layer, a plurality of barrier layers, and a p-type semiconductor layer. The barrier layers have an energy band gap greater than that of the channel layer. A gate electrode is arranged on the p-type semiconductor layer. A source electrode and a drain electrode are apart from the p-type semiconductor layer and the gate electrode on the barrier layers. Impurity concentrations of the barrier layers are different from each other in a drift area between the source electrode and the drain electrode.

公开(公告)号：US20210184010A1

公开(公告)日：2021-06-17

申请号：US17016877

申请日：2020-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soogine CHONG ,  Jongseob KIM ,  Joonyong KIM ,  Younghwan PARK ,  Junhyuk PARK ,  Dongchul SHIN ,  Jaejoon OH ,  Sunkyu HWANG ,  Injun HWANG

IPC: H01L29/423 ,  H01L23/31 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40 ,  H01L29/778 ,  H01L21/02 ,  H01L21/285 ,  H01L21/765 ,  H01L29/66

Abstract: A semiconductor device includes a channel layer including a channel; a channel supply layer on the channel layer; a channel separation pattern on the channel supply layer; a gate electrode pattern on the channel separation pattern; and an electric-field relaxation pattern protruding from a first lateral surface of the gate electrode pattern in a first direction parallel with an upper surface of the channel layer. An interface between the channel layer and the channel supply layer is adjacent to channel. A size of the gate electrode pattern in the first direction is different from a size of the channel separation pattern in the first direction. The gate electrode pattern and the electric-field relaxation pattern form a single structure.

公开(公告)号：US20240258398A1

公开(公告)日：2024-08-01

申请号：US18381945

申请日：2023-10-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junhyuk PARK ,  Jaejoon OH ,  Injun HWANG ,  Boram KIM ,  Jongseob KIM ,  Joonyong KIM

IPC: H01L29/47 ,  H01L29/20 ,  H01L29/40 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L29/475 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/66462 ,  H01L29/7786

Abstract: A high electron mobility transistor (HEMT) includes a substrate, a channel layer on the substrate, a barrier layer on the channel layer, a p-type gallium nitride (GaN) layer on the barrier layer, an n-type interfacial layer on the p-type GaN layer, and a gate electrode on the n-type interfacial layer.

公开(公告)号：US20240243177A1

公开(公告)日：2024-07-18

申请号：US18347223

申请日：2023-07-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joonyong KIM ,  Jaejoon OH ,  Boram KIM ,  Jongseob KIM ,  Junhyuk PARK ,  Sunkyu HWANG ,  Injun HWANG

IPC: H01L29/20 ,  H01L29/417 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L29/2003 ,  H01L29/41766 ,  H01L29/66462 ,  H01L29/7786

Abstract: A method of manufacturing a semiconductor device according to various example embodiments includes forming a buffer layer and a first semiconductor layer on a substrate, forming a recess by etching the first semiconductor layer, sequentially forming a second semiconductor layer and a third semiconductor layer on the first semiconductor layer in which the recess is formed, and forming a source and a drain respectively in contact with both sides of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer.

公开(公告)号：US20220367698A1

公开(公告)日：2022-11-17

申请号：US17465212

申请日：2021-09-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunkyu HWANG ,  Jongseob KIM ,  Joonyong KIM ,  Younghwan PARK ,  Junhyuk PARK ,  Jaejoon OH ,  Injun HWANG

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/66

Abstract: A semiconductor integrated circuit device includes: a channel layer, a barrier layer; a first p-type semiconductor layer and a second p-type semiconductor layer, spaced apart from each other on the barrier layer; and a passivation layer on the first p-type semiconductor layer and the second p-type semiconductor layer. The passivation layer may partially inactivate a dopant of at least one of the first p-type semiconductor layer and the second p-type semiconductor layer.

公开(公告)号：US20210313465A1

公开(公告)日：2021-10-07

申请号：US17349327

申请日：2021-06-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Injun HWANG ,  Jongseob KIM ,  Joonyong KIM ,  Younghwan PARK ,  Junhyuk PARK ,  Dongchul SHIN ,  Jaejoon OH ,  Soogine CHONG ,  Sunkyu HWANG

IPC: H01L29/78 ,  H01L29/20 ,  H01L29/205 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40

Abstract: Provided is a field effect transistor (FET) including a gradually varying composition channel. The FET includes: a drain region; a drift region on the drain region; a channel region on the drift region; a source region on the channel region; a gate penetrating the channel region and the source region in a vertical direction; and a gate oxide surrounding the gate. The channel region has a gradually varying composition along the vertical direction such that an intensity of a polarization in the channel region gradually varies.