公开(公告)号：US20220399251A1

公开(公告)日：2022-12-15

申请号：US17708137

申请日：2022-03-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyoukyung CHO ,  Hojin LEE ,  Kwangjin MOON

IPC: H01L23/48 ,  H01L21/768 ,  H01L25/065 ,  H01L21/762 ,  H01L29/06

Abstract: A semiconductor device includes: a semiconductor substrate having opposing first side and second sides; an active region and an isolation region on the first side; a circuit device on the active region; a front side interconnection structure on the first side and including front side interconnection layers disposed on different levels; first and second back side interconnection structures below the second side; a buried structure having a portion disposed in the isolation region and including a conductive line; a first through-electrode structure including a first through-electrode contacting the conductive line and penetrating the semiconductor substrate between the conductive line and the first back side interconnection structure; and a second through-electrode structure including a second through-electrode penetrating the semiconductor substrate between a first front side interconnection layer and the second back side interconnection structure. The first front side interconnection layer is on a level higher than that of the conductive line.

公开(公告)号：US20210305186A1

公开(公告)日：2021-09-30

申请号：US17035215

申请日：2020-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyungjun JEON ,  Kwangjin MOON ,  Hakseung LEE ,  Hyoukyung CHO

IPC: H01L23/00 ,  H01L25/065 ,  H01L21/683 ,  H01L21/78 ,  H01L25/00

Abstract: A semiconductor stack and a method for manufacturing the same are disclosed. The semiconductor stack includes a lower chip, an upper chip disposed over the lower chip, an upper lateral-side passivation layer surrounding side surfaces of the upper chip, and a plurality of bonding pads and a bonding passivation layer disposed between the upper chip and the lower chip.

公开(公告)号：US20210020544A1

公开(公告)日：2021-01-21

申请号：US16795686

申请日：2020-02-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myungjoo PARK ,  Jaewon HWANG ,  Kwangjin MOON ,  Kunsang PARK

IPC: H01L23/48 ,  H01L23/538 ,  H01L23/00 ,  H01L21/48

Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. The semiconductor device includes a substrate, a first through substrate via configured to penetrate at least partially through the substrate, the first through substrate via having a first aspect ratio, and a second through substrate via configured to penetrate at least partially through the substrate. The second through substrate via has a second aspect ratio greater than the first aspect ratio, and each of the first through substrate via and the second through substrate via includes a first conductive layer and a second conductive layer. A thickness in a vertical direction of the first conductive layer of the first through substrate via is less than a thickness in the vertical direction of the first conductive layer of the second through substrate via.

公开(公告)号：US20200066682A1

公开(公告)日：2020-02-27

申请号：US16408891

申请日：2019-05-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taeseong KIM ,  Kwangjin MOON ,  Hyoju KIM ,  Junhong MIN ,  Hakseung LEE

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/768

Abstract: Disclosed are semiconductor packages and methods of manufacturing the same. The semiconductor package comprises a substrate, a first unit structure attached to the substrate, and a second unit structure attached to the first unit structure. Each of the first and second unit structures comprises an adhesive layer, a lower semiconductor chip on the adhesive layer, an upper semiconductor chip on and in contact with the lower semiconductor chip, and a plurality of vias penetrating the upper semiconductor chip and connecting with the lower and upper semiconductor chips.