公开(公告)号：US10146896B2

公开(公告)日：2018-12-04

申请号：US15344346

申请日：2016-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jing Wang ,  Nuo Xu ,  Woosung Choi

IPC: G06F17/00 ,  G06F17/50 ,  H01L27/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/45

Abstract: A method for selecting transistor design parameters. A first set of simulations is used to calculate leakage current at a plurality of sets of design parameter values, and the results are fitted with a first response surface methodology model. The first model is used to generate a function that returns a value of a selected design parameter, for which a leakage current specification is just met. A second set of simulations is used to calculate effective drive current for a plurality of sets of design parameter values, and the results are fitted with a second response surface methodology model. The second model is used, together with the first, to search for a set of design parameter values at which a worst-case effective drive current is greatest, subject to the constraint of meeting the worst-case leakage current specification.

公开(公告)号：US10032260B2

公开(公告)日：2018-07-24

申请号：US15039223

申请日：2015-01-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woosung Choi ,  Jungeun Lee

IPC: G06T5/00 ,  G06T3/00 ,  G06T15/10 ,  H04N13/04

Abstract: A method and electronic device for processing an image in an electronic device. The method includes predicting the number of surfaces which can be partitioned in image data; determining an inverse distortion rendering method corresponding to the predicted number of surfaces as a method for inverse distortion rendering of the image data; rendering the image data to a distorted image based on the determined inverse distortion rendering method; and displaying the distorted image.

公开(公告)号：US11171211B1

公开(公告)日：2021-11-09

申请号：US16900788

申请日：2020-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hong-Hyun Park ,  Zhengping Jiang ,  Hesameddin Ilatikhameneh ,  Woosung Choi ,  Chihak Ahn

IPC: H01L29/10 ,  H01L29/08 ,  H01L21/02 ,  H01L29/04 ,  H01L29/66

Abstract: A method of manufacturing a p-type MOSFET includes depositing a channel material to form a channel region, forming a source region and a drain region on each side of the channel region along a first direction, depositing a gate oxide layer on the channel region along a second direction crossing the first direction, and depositing a gate electrode on the gate oxide. The channel material includes a group IV element or III-V semiconductor compound and have a diamond or zincblende cubic crystal structure. A direction of the crystal structure is parallel to the second direction. Two adjacent atoms on an out-most atomic layer of the channel region along the first direction are connected to each other via a single intervening atom, and an interface between the gate oxide layer and the channel region has a surface roughness of 1 angstrom or lower.

公开(公告)号：US11120630B2

公开(公告)日：2021-09-14

申请号：US16536195

申请日：2019-08-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woosung Choi ,  Hyuk Kang ,  Minji Kim ,  Dongil Son ,  Buseop Jung ,  Jongho Choi ,  Jooman Han

IPC: G06T19/00 ,  G06F3/01

Abstract: An electronic device providing information through a virtual environment is disclosed. The device includes: a display; and an information providing module functionally connected with the display, wherein the information providing module displays an object corresponding to an external electronic device for the electronic device through the display, obtains information to be output through the external electronic device, and provides contents corresponding to the information in relation to a region, on which the object is displayed.

公开(公告)号：US11003737B2

公开(公告)日：2021-05-11

申请号：US15696150

申请日：2017-09-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Nuo Xu ,  Jing Wang ,  Zhengping Jiang ,  Woosung Choi

IPC: G06F17/18 ,  G01R31/28 ,  G06F17/14 ,  G06F7/62 ,  G01R31/317

Abstract: A method of circuit yield analysis for evaluating rare failure events includes performing initial sampling to detect failed samples respectively located at one or more failure regions in a multi-dimensional parametric space, generating a distribution of failed samples at discrete values along each dimension, identifying the failed samples, performing a transform to project the failed samples into all dimensions in a transform space, and classifying a type of failure region for each dimension in the parametric space.

公开(公告)号：US20180300288A1

公开(公告)日：2018-10-18

申请号：US15696150

申请日：2017-09-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Nuo Xu ,  Jing Wang ,  Zhengping Jiang ,  Woosung Choi

IPC: G06F17/18 ,  G06F17/14 ,  G01R31/28

Abstract: A method of circuit yield analysis for evaluating rare failure events includes performing initial sampling to detect failed samples respectively located at one or more failure regions in a multi-dimensional parametric space, generating a distribution of failed samples at discrete values along each dimension, identifying the failed samples, performing a transform to project the failed samples into all dimensions in a transform space, and classifying a type of failure region for each dimension in the parametric space.

公开(公告)号：US20160267205A1

公开(公告)日：2016-09-15

申请号：US14991124

申请日：2016-01-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jing Wang ,  Nuo Xu ,  Woosung Choi

IPC: G06F17/50

CPC classification number: G06F17/5009 ,  G06F17/5036 ,  G06F17/5081 ,  G06F2217/10

Abstract: A computer implemented method for determining performance of a semiconductor device is provided. The method includes providing a technology computer aided design data set corresponding to nominal performance of the semiconductor device, identifying a plurality of process variation sources that correspond to process variations that occur during the manufacturing of the semiconductor device, generating a nominal value look-up table of electrical parameters of the semiconductor device using nominal values of each of the plurality of process variation sources, and generating a plurality of process variation look-up tables of electrical parameters of the semiconductor device using variation values corresponding to each of the plurality of process variation sources that are identified as corresponding to the semiconductor device.

Abstract translation: 提供了一种用于确定半导体器件性能的计算机实现方法。 该方法包括提供对应于半导体器件的标称性能的技术计算机辅助设计数据集，识别对应于在制造半导体器件期间发生的工艺变化的多个工艺变化源，产生标称值查找表 使用所述多个处理变化源中的每一个的标称值来使用所述半导体器件的电参数，以及使用对应于所述多个工艺变化中的每一个的变化值来生成所述半导体器件的电参数的多个工艺变化查找表 被识别为对应于半导体器件的源。