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公开(公告)号:US10217772B2
公开(公告)日:2019-02-26
申请号:US15959566
申请日:2018-04-23
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hideaki Shishido , Hiroyuki Miyake , Kouhei Toyotaka , Makoto Kaneyasu
IPC: H01L27/12 , H01L27/32 , G02F1/1343 , G02F1/1362 , G09G3/36 , G09G3/20 , H01L33/62
Abstract: Provided is a display device with high resolution, high display quality, or high aperture ratio. A pixel includes three subpixels and is electrically connected to two gate lines. One of the gate lines is electrically connected to a gate of a transistor included in each of the two subpixels, and the other gate line is electrically connected to a gate of a transistor included in the other subpixel. Display elements of the three subpixels are arranged in the same direction. Three pixel electrodes of the three subpixels are arranged in the same direction.
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公开(公告)号:US20180348561A1
公开(公告)日:2018-12-06
申请号:US16100261
申请日:2018-08-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Atsushi Umezaki , Hiroyuki Miyake
IPC: G02F1/1368 , G09G3/36 , H01L27/12 , G09G3/3266 , H01L27/32 , G02F1/1362 , G09G3/34 , G09G3/3275 , G09G3/3233 , G09G3/20 , H01L27/15 , H01L29/423
Abstract: An object of the invention is to provide a circuit technique which enables reduction in power consumption and high definition of a display device. A switch controlled by a start signal is provided to a gate electrode of a transistor, which is connected to a gate electrode of a bootstrap transistor. When the start signal is input, a potential is supplied to the gate electrode of the transistor through the switch, and the transistor is turned off. The transistor is turned off, so that leakage of a charge from the gate electrode of the bootstrap transistor can be prevented. Accordingly, time for storing a charge in the gate electrode of the bootstrap transistor can be shortened, and high-speed operation can be performed.
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公开(公告)号:US10083651B2
公开(公告)日:2018-09-25
申请号:US14881500
申请日:2015-10-13
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Jun Koyama , Hiroyuki Miyake
IPC: G09G3/32 , G09G3/3208 , H01L27/12 , G09G3/3233 , H01L29/786 , G09G3/20 , H01L27/32
CPC classification number: G09G3/3208 , G09G3/2003 , G09G3/3233 , G09G2330/021 , H01L27/1225 , H01L27/3262 , H01L27/3276 , H01L29/78609 , H01L29/7869 , H01L29/78693 , H01L29/78696
Abstract: Objects are to provide a display device the power consumption of which is reduced, to provide a self-luminous display device the power consumption of which is reduced and which is capable of long-term use in a dark place. A circuit is formed using a thin film transistor in which a highly-purified oxide semiconductor is used and a pixel can keep a certain state (a state in which a video signal has been written). As a result, even in the case of displaying a still image, stable operation is easily performed. In addition, an operation interval of a driver circuit can be extended, which results in a reduction in power consumption of a display device. Moreover, a light-storing material is used in a pixel portion of a self-luminous display device to store light, whereby the display device can be used in a dark place for a long time.
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公开(公告)号:US10043858B2
公开(公告)日:2018-08-07
申请号:US15496292
申请日:2017-04-25
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Yasuharu Hosaka , Yukinori Shima , Masataka Nakada
IPC: G02F1/1368 , H01L27/32 , G02F1/1362 , H01L51/50 , G02F1/1335 , H01L51/52 , G02F1/1343 , G02F1/1333 , H01L29/786
Abstract: A novel display device that is highly convenient or reliable is provided. The display device includes a first display element, a second display element, a first transistor, a second transistor, and a third transistor. The first display element includes a liquid crystal layer. The second display element includes a light-emitting layer. The first transistor has a function of selecting the first display element. The second transistor has a function of selecting the second display element. The third transistor has a function of controlling the driving of the second display element. The first transistor and the second transistor are formed over the same surface. The third transistor is formed above the first transistor and the second transistor and includes one of a source electrode and a drain electrode of the second transistor as a gate electrode.
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公开(公告)号:US10032798B2
公开(公告)日:2018-07-24
申请号:US15341069
申请日:2016-11-02
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake
IPC: H01L21/32 , G09G3/3233 , H01L27/12 , H01L27/06 , G09G3/3275 , H01L33/62 , H01L27/32
Abstract: An object is to prevent an operation defect and to reduce an influence of fluctuation in threshold voltage of a field-effect transistor. A field-effect transistor, a switch, and a capacitor are provided. The field-effect transistor includes a first gate and a second gate which overlap with each other with a channel formation region therebetween, and the threshold voltage of the field-effect transistor varies depending on the potential of the second gate. The switch has a function of determining whether electrical connection between one of a source and a drain of the field-effect transistor and the second gate of the field-effect transistor is established. The capacitor has a function of holding a voltage between the second gate of the field-effect transistor and the other of the source and the drain of the field-effect transistor.
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公开(公告)号:US09984644B2
公开(公告)日:2018-05-29
申请号:US13949273
申请日:2013-07-24
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei Yamazaki , Jun Koyama , Yoshiharu Hirakata , Hiroyuki Miyake
IPC: G09G3/36
CPC classification number: G09G3/3696 , G09G3/3614 , G09G3/3648 , G09G2310/065 , G09G2310/08 , G09G2330/02
Abstract: Power consumed in a liquid crystal display device owing to inversion driving is reduced. A control circuit generates a polarity control signal whose potential level is switched at intervals of two or more frame periods. A data line driver circuit processes an image signal to generate a data signal. The data signal has a polarity corresponding to the potential level of the polarity control signal. The control circuit stops output of the image signal to the data line driver circuit when determining that there is no motion in data of the image signal. The control circuit controls a scan line driver circuit and the data line driver circuit, thereby performing, in response to a change in the potential level of the polarity control signal, rewriting of a display portion at least in one frame period during a period in which the output of the image signal is stopped.
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公开(公告)号:US09935129B2
公开(公告)日:2018-04-03
申请号:US15621432
申请日:2017-06-13
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Kei Takahashi , Hiroyuki Miyake , Hidekazu Miyairi
IPC: H01L27/12 , G09G3/3291 , G09G3/36
CPC classification number: H01L27/1225 , G09G3/3291 , G09G3/3688 , G09G2300/0838 , G09G2300/0871 , G09G2310/027 , G09G2310/0289 , G09G2310/0291 , G09G2330/04
Abstract: To provide a semiconductor device including a small-area circuit with high withstand voltage, an oxide semiconductor (OS) transistor is used as some of transistors included in a circuit handling an analog signal in a circuit to which high voltage is applied. The use of an OS transistor with high withstand voltage as a transistor requiring resistance to high voltage enables the circuit area to be reduced without lowering the performance, as compared to the case using a Si transistor. Furthermore, an OS transistor can be provided over a Si transistor, so that transistors using different semiconductor layers can be stacked, resulting in a much smaller circuit area.
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公开(公告)号:US09865871B2
公开(公告)日:2018-01-09
申请号:US14972796
申请日:2015-12-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Nobuhiro Inoue , Takuya Hirohashi , Yuika Sato
IPC: H01M4/48 , C01B33/113 , H01M10/0525 , H01M4/131
CPC classification number: H01M4/483 , C01B33/113 , H01M4/131 , H01M10/0525 , Y02E60/122
Abstract: Silicon oxide which is an oxide containing at least silicon, in which part of silicon is replaced by boron, aluminum, or gallium, is provided.
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公开(公告)号:US09851839B2
公开(公告)日:2017-12-26
申请号:US15053468
申请日:2016-02-25
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Shunpei Yamazaki
IPC: G09G3/36 , G06F3/041 , G06F3/048 , G09G3/20 , G06F3/0485 , G02F1/1343
CPC classification number: G06F3/0416 , G02F1/134363 , G02F2001/134372 , G06F3/0485 , G06F3/04855 , G09G3/20 , G09G2310/0224 , G09G2320/0626 , G09G2320/066 , G09G2320/0686 , G09G2320/10
Abstract: Eye-friendly display that can reduce eye strain on a user is achieved. A display system includes a display portion, an input portion, and a control portion. The display portion is configured to display an image. The input portion is configured to sense an input from a user and output a signal to the control portion. The control portion is configured to execute a first mode and a second mode. In the first mode executed by the control portion, an image is displayed on the display portion by an interlace method. In the second mode executed by the control portion, an image is displayed on the display portion by a progressive method. The control portion is configured to switch between the first mode and the second mode in accordance with the signal.
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公开(公告)号:US09842861B2
公开(公告)日:2017-12-12
申请号:US15391938
申请日:2016-12-28
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Atsushi Umezaki , Hiroyuki Miyake
IPC: G09G3/3266 , G09G3/20 , G09G3/36 , H01L27/02 , H01L27/12
CPC classification number: H01L27/124 , G09G3/2092 , G09G3/3266 , G09G3/3674 , G09G3/3677 , G09G2300/0809 , G09G2310/0205 , G09G2310/0248 , G09G2310/0286 , G09G2310/0289 , G09G2310/0291 , G09G2310/061 , G09G2320/0646 , G09G2320/0666 , G11C19/28 , H01L27/0207 , H01L27/1222 , H01L27/1225
Abstract: To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor; a clock signal is input to a gate electrode of the first switching transistor; and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.
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