公开(公告)号：US10770596B2

公开(公告)日：2020-09-08

申请号：US16600375

申请日：2019-10-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Junpei Sugao ,  Hideki Uochi ,  Yasuo Nakamura

IPC: H01L29/786 ,  H01L21/768 ,  H01L27/12 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66 ,  H01L21/02 ,  H01L21/324 ,  H01L29/24 ,  H01L29/423

Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.

公开(公告)号：US10529413B2

公开(公告)日：2020-01-07

申请号：US16103157

申请日：2018-08-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tomoaki Atsumi ,  Junpei Sugao

IPC: G11C11/401 ,  G11C11/4094 ,  H01L29/786 ,  H01L27/12 ,  G11C11/4096 ,  G11C11/4097 ,  H01L27/11 ,  H01L27/1156

Abstract: The semiconductor device includes a first memory cell, and a second memory cell thereover. The first memory cell includes first and second transistors, and a first capacitor. The second memory cell includes third and fourth transistors, and a second capacitor. A gate of the first transistor is electrically connected to one of a source and a drain of the second transistor and the first capacitor. A gate of the third transistor is electrically connected to one of a source and a drain of the fourth transistor and the second capacitor. One of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the third transistor. The second and fourth transistors include an oxide semiconductor. A channel length direction of the first and third transistors is substantially perpendicular to a channel length direction of the second and fourth transistors.

公开(公告)号：US10446693B2

公开(公告)日：2019-10-15

申请号：US16053200

申请日：2018-08-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Junpei Sugao ,  Hideki Uochi ,  Yasuo Nakamura

IPC: H01L29/786 ,  H01L21/768 ,  H01L27/12 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66 ,  H01L21/02 ,  H01L21/324 ,  H01L29/24 ,  H01L29/423

Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.

公开(公告)号：US09177855B2

公开(公告)日：2015-11-03

申请号：US14467142

申请日：2014-08-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Junpei Sugao ,  Hideki Uochi ,  Yasuo Nakamura

IPC: H01L21/768 ,  H01L27/12 ,  H01L29/45 ,  H01L29/49 ,  H01L29/786 ,  H01L29/66 ,  H01L21/324 ,  H01L21/02

CPC classification number: H01L29/7869 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/324 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76838 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606

Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.

Abstract translation: 通过使用包含Cu的导电层作为长引线，可以抑制布线电阻的增加。 此外，包括Cu的导电层以与形成TFT的沟道区域的氧化物半导体层不重叠并被包括氮化硅的绝缘层包围的方式设置，由此Cu的扩散可以 防止 因此，可以制造高度可靠的半导体器件。 具体地说，作为半导体装置的一个实施方式的显示装置，即使在尺寸或定义增加的情况下也能够具有高的显示质量，并且稳定地工作。

公开(公告)号：US09154035B2

公开(公告)日：2015-10-06

申请号：US14644409

申请日：2015-03-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yutaka Shionoiri ,  Junpei Sugao

IPC: H02M3/18 ,  H02M3/158

CPC classification number: H02M3/158 ,  H01L27/0688 ,  H01L27/1225 ,  H02M3/073

Abstract: One object is to provide a boosting circuit whose boosting efficiency is enhanced. Another object is to provide an RFID tag including a boosting circuit whose boosting efficiency is enhanced. A node corresponding to an output terminal of a unit boosting circuit or a gate electrode of a transistor connected to the node is boosted by bootstrap operation, so that a decrease in potential which corresponds to substantially the same as the threshold potential of the transistor can be prevented and a decrease in output potential of the unit boosting circuit can be prevented.

公开(公告)号：US20140077786A1

公开(公告)日：2014-03-20

申请号：US14088496

申请日：2013-11-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka Shionoiri ,  Junpei Sugao

IPC: H02M3/158

CPC classification number: H02M3/158 ,  H01L27/0688 ,  H01L27/1225 ,  H02M3/073

Abstract: One object is to provide a boosting circuit whose boosting efficiency is enhanced. Another object is to provide an RFID tag including a boosting circuit whose boosting efficiency is enhanced. A node corresponding to an output terminal of a unit boosting circuit or a gate electrode of a transistor connected to the node is boosted by bootstrap operation, so that a decrease in potential which corresponds to substantially the same as the threshold potential of the transistor can be prevented and a decrease in output potential of the unit boosting circuit can be prevented.

Abstract translation: 一个目的是提供一种提升效率提高的升压电路。 另一个目的是提供一种RFID标签，其包括提升效率提高的升压电路。 与单元升压电路的输出端子或与该节点连接的晶体管的栅电极对应的节点通过自举运算来升压，使得与晶体管的阈值电位基本相同的电位降低可以是 可以防止单元升压电路的输出电位的降低。