公开(公告)号：US09449996B2

公开(公告)日：2016-09-20

申请号：US13957819

申请日：2013-08-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroyuki Miyake ,  Hideaki Shishido ,  Jun Koyama ,  Daisuke Matsubayashi ,  Keisuke Murayama

IPC: H01L31/00 ,  H01L27/12 ,  G02F1/1362 ,  H01L27/32 ,  G02F1/1339 ,  G02F1/1345 ,  G02F1/1343

CPC classification number: H01L27/1255 ,  G02F1/1339 ,  G02F1/134363 ,  G02F1/13454 ,  G02F1/13458 ,  G02F1/136204 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2201/121 ,  G02F2201/123 ,  G02F2201/40 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/3265 ,  H01L29/7869

Abstract: To provide a semiconductor device including a capacitor whose charge capacity is increased without reducing the aperture ratio. The semiconductor device includes a transistor including a light-transmitting semiconductor film, a capacitor where a dielectric film is provided between a pair of electrodes, an insulating film provided over the light-transmitting semiconductor film, and a light-transmitting conductive film provided over the insulating film. In the capacitor, a metal oxide film containing at least indium (In) or zinc (Zn) and formed on the same surface as the light-transmitting semiconductor film in the transistor serves as one electrode, the light-transmitting conductive film serves as the other electrode, and the insulating film provided over the light-transmitting semiconductor film serves as the dielectric film.

Abstract translation: 提供一种包括电容器的半导体器件，其电容量增加而不降低开口率。 半导体器件包括：晶体管，包括透光半导体膜，电容器，其中电介质膜设置在一对电极之间;绝缘膜设置在透光半导体膜上;以及透光导电膜， 绝缘膜。 在电容器中，与晶体管中的透光性半导体膜相同的表面上形成至少含有铟（In）或锌（Zn）的金属氧化物膜作为一个电极，透光性导电膜作为 设置在透光半导体膜上的绝缘膜用作电介质膜。

公开(公告)号：US08946702B2

公开(公告)日：2015-02-03

申请号：US13860792

申请日：2013-04-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Daisuke Matsubayashi ,  Keisuke Murayama

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/7831

Abstract: A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.

Abstract translation: 晶体管包括通过介于第一栅极电极层和氧化物半导体层叠层之间的绝缘层在第一栅极电极层和第二栅极电极层之间的氧化物半导体堆叠层和介于第二栅极电极层和氧化物之间的绝缘层 半导体堆叠层。 沟道形成区域的厚度小于氧化物半导体堆叠层中的其它区域。 此外，在该晶体管中，栅电极层之一被设置为所谓的用于控制阈值电压的背栅。 控制施加到背栅的电位使得能够控制晶体管的阈值电压，这使得容易维持晶体管的常关特性。

公开(公告)号：US20140110707A1

公开(公告)日：2014-04-24

申请号：US14061510

申请日：2013-10-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Yukinori Shima ,  Hajime Tokunaga ,  Toshinari Sasaki ,  Keisuke Murayama ,  Daisuke Matsubayashi

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  H01L29/51

CPC classification number: H01L29/78696 ,  H01L21/022 ,  H01L21/02263 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/0262 ,  H01L29/24 ,  H01L29/513 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78693

Abstract: In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

Abstract translation: 在包括晶体管的半导体器件中，所述晶体管包括形成在衬底上的栅电极，覆盖栅电极的栅极绝缘膜，与栅电极重叠的多层膜，栅极绝缘膜设置在其间;以及一对电极， 多层膜，覆盖晶体管的第一氧化物绝缘膜和形成在第一氧化物绝缘膜上的第二氧化物绝缘膜，所述多层膜包括氧化物半导体膜和含有In或Ga的氧化物膜，所述氧化物半导体膜具有无定形 结构或微晶结构，所述第一氧化物绝缘膜是透过氧的氧化物绝缘膜，所述第二氧化物绝缘膜是比所述化学计量组成中含有氧更多的氧化物绝缘膜。

公开(公告)号：US20140110705A1

公开(公告)日：2014-04-24

申请号：US14060925

申请日：2013-10-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Yukinori Shima ,  Hajime Tokunaga ,  Toshinari Sasaki ,  Keisuke Murayama ,  Daisuke Matsubayashi

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  H01L29/51

CPC classification number: H01L29/66969 ,  H01L21/022 ,  H01L21/02263 ,  H01L27/1225 ,  H01L29/513 ,  H01L29/78609 ,  H01L29/7869

Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve the electrical characteristics and the reliability of a semiconductor device including an oxide semiconductor film. In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

Abstract translation: 为了减少半导体器件中的氧化物半导体膜的缺陷。 为了改善包括氧化物半导体膜的半导体器件的电特性和可靠性。 在包括晶体管的半导体器件中，所述晶体管包括形成在衬底上的栅电极，覆盖栅电极的栅极绝缘膜，与栅电极重叠的多层膜，栅极绝缘膜设置在其间;以及一对电极， 多层膜，覆盖晶体管的第一氧化物绝缘膜和形成在第一氧化物绝缘膜上的第二氧化物绝缘膜，多层膜包括氧化物半导体膜和含有In或Ga的氧化物膜，第一氧化物绝缘膜为 氧透过氧化物绝缘膜，第二氧化物绝缘膜是比化学计量组合物含有氧更多的氧化物绝缘膜。