公开(公告)号：US20120098609A1

公开(公告)日：2012-04-26

申请号：US13220840

申请日：2011-08-30

申请人： Ashutosh Verma ,  Xiaoyue Wang ,  Shingo Hatanaka ,  Shafiq M. Jamal

发明人： Ashutosh Verma ,  Xiaoyue Wang ,  Shingo Hatanaka ,  Shafiq M. Jamal

IPC分类号： H03B5/32

CPC分类号： H03B5/36 ,  H03B2200/0012 ,  H03B2200/0046

摘要： Circuits having corresponding methods and computer-readable media comprise: an amplifier; a crystal port configured to be electrically coupled to a crystal, wherein a first terminal of the crystal port is electrically coupled to an input of the amplifier, and wherein a second terminal of the crystal port is electrically coupled to an output of the amplifier; a first capacitor, wherein a first terminal of the first capacitor is electrically coupled to ground; a second capacitor, wherein a first terminal of the second capacitor is electrically coupled to ground; a first switch configured to selectively electrically couple the input of the amplifier to a second terminal of the first capacitor; and a second switch configured to selectively electrically couple the output of the amplifier to a second terminal of the second capacitor.

摘要翻译： 具有相应方法和计算机可读介质的电路包括：放大器; 晶体端口被配置为电耦合到晶体，其中晶体端口的第一端子电耦合到放大器的输入端，并且其中晶体端口的第二端子电耦合到放大器的输出端; 第一电容器，其中所述第一电容器的第一端子电耦合到地; 第二电容器，其中所述第二电容器的第一端子电耦合到地; 第一开关，其被配置为选择性地将所述放大器的输入电耦合到所述第一电容器的第二端子; 以及第二开关，被配置为选择性地将所述放大器的输出电耦合到所述第二电容器的第二端子。

公开(公告)号：US20110204724A1

公开(公告)日：2011-08-25

申请号：US13026938

申请日：2011-02-14

申请人： Ashutosh Verma ,  Shafiq M. Jamal ,  Thomas B. Cho ,  Sehat Sutardja

发明人： Ashutosh Verma ,  Shafiq M. Jamal ,  Thomas B. Cho ,  Sehat Sutardja

IPC分类号： H02M3/06

CPC分类号： H02M3/07 ,  H02M2001/009

摘要： An apparatus includes a first switch coupled to a first voltage reference and a second switch coupled to a second voltage reference. A third switch is coupled to a first terminal of a first capacitor and a first terminal of a second capacitor. A fourth switch is coupled to a second terminal of the first capacitor and the first terminal of the second capacitor. A fifth switch is coupled to the second terminal of the first capacitor and a first terminal of a third capacitor. A sixth switch is coupled to the first terminal of the first capacitor and the first terminal of the third capacitor. The first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the sixth switch are controlled to maintain a first voltage level at a first output and a second voltage level at a second output.

摘要翻译： 一种装置包括耦合到第一电压基准的第一开关和耦合到第二电压基准的第二开关。 第三开关耦合到第一电容器的第一端子和第二电容器的第一端子。 第四开关耦合到第一电容器的第二端子和第二电容器的第一端子。 第五开关耦合到第一电容器的第二端子和第三电容器的第一端子。 第六开关耦合到第一电容器的第一端子和第三电容器的第一端子。 控制第一开关，第二开关，第三开关，第四开关，第五开关和第六开关，以将第一电压电平维持在第一输出，第二电压电平维持在第二输出。

公开(公告)号：US07504892B1

公开(公告)日：2009-03-17

申请号：US11809373

申请日：2007-06-01

申请人： Alessandro Pesucci ,  Shafiq M. Jamal

发明人： Alessandro Pesucci ,  Shafiq M. Jamal

IPC分类号： H03L7/00

CPC分类号： H03L7/0896 ,  H03L7/18

摘要： A charge-pump includes a first charge-pump sub-circuit having a control terminal that communicates with a first bias voltage line. A first charge-pump mirror sub-circuit regulates current on the control terminal. A first capacitance and a first ripple reducing sub-circuit communicate with the first bias voltage line. A second charge-pump sub-circuit and a second charge-pump mirror sub-circuit communicate with a second bias voltage line. A second capacitance and a second ripple reducing sub-circuit communicate with the second bias voltage line. An output communicates with the first and second charge-pump sub-circuits.

摘要翻译： 电荷泵包括具有与第一偏置电压线连通的控制端子的第一电荷泵子电路。 第一电荷泵镜子分电路调节控制端上的电流。 第一电容和第一纹波减小子电路与第一偏置电压线通信。 第二电荷泵子电路和第二电荷泵反射镜子电路与第二偏压线通信。 第二电容和第二纹波减小子电路与第二偏压线通信。 输出与第一和第二电荷泵子电路通信。

公开(公告)号：US08816658B1

公开(公告)日：2014-08-26

申请号：US12204316

申请日：2008-09-04

申请人： Guiseppe De Vita ,  Shafiq M. Jamal

发明人： Guiseppe De Vita ,  Shafiq M. Jamal

IPC分类号： G05F1/565

CPC分类号： G05F1/575 ,  G05F1/565

摘要： A low-dropout converter includes a capacitor and a resistor. The resistor is coupled to the capacitor. The resistor includes a fixed resistor and at least one variable resistor. The capacitor and the resistor determine the location of a zero of the transfer function of the low-dropout converter.

摘要翻译： 低压差转换器包括电容器和电阻器。 电阻器耦合到电容器。 电阻器包括固定电阻器和至少一个可变电阻器。 电容器和电阻器确定低压差转换器的传递函数零点的位置。

公开(公告)号：US20130328844A1

公开(公告)日：2013-12-12

申请号：US13491430

申请日：2012-06-07

申请人： Daniel A. Villamizar ,  Ahmad Al-Dahle ,  Shafiq M. Jamal

发明人： Daniel A. Villamizar ,  Ahmad Al-Dahle ,  Shafiq M. Jamal

IPC分类号： G06F3/038

CPC分类号： G06F1/24 ,  G06F3/041

摘要： Systems, devices, and methods for using clock detector circuitry to reduce turn-on time of an electronic display, improve image quality, and reduce operations of a host are provided. In one example, a system may include a host configured to transmit a number of signals and a display driver coupled to the host. The number of signals may include a clock signal and data signals. The display driver is configured to drive a display based at least in part on the data signals. The display driver is also configured to be reset upon detection of the clock signal without waiting for a host-issued reset signal. A clock detect circuit configured to detect the clock signal may be configured to transmit an internal reset signal to reset the display driver without a dedicated host-issued reset signal.

摘要翻译： 提供了使用时钟检测器电路来减少电子显示器的开启时间，提高图像质量和减少主机操作的系统，设备和方法。 在一个示例中，系统可以包括被配置为发送多个信号的主机和耦合到主机的显示驱动器。 信号的数量可以包括时钟信号和数据信号。 显示驱动器被配置为至少部分地基于数据信号来驱动显示器。 显示驱动器还被配置为在检测到时钟信号时被复位，而不等待主机发出的复位信号。 被配置为检测时钟信号的时钟检测电路可以被配置为发送内部复位信号以复位显示驱动器，而不需要专用的主机发出的复位信号。

公开(公告)号：US20130328839A1

公开(公告)日：2013-12-12

申请号：US13604580

申请日：2012-09-05

申请人： Shafiq M. Jamal

发明人： Shafiq M. Jamal

IPC分类号： G06F3/038

CPC分类号： G09G3/3648 ,  G09G2320/0219 ,  G09G2330/12

摘要： A display system includes a display panel of pixels, a gate driver and a compensation unit. The gate driver receives a control signal and based on the control signal, generates a gate signal to drive a transistor included in a pixel. The compensation unit measures and compensates for a fall time of the gate driver. The compensation unit includes a replica gate driver, a peak RMS detector, a comparator and a counter. The replica gate driver generates a replica gate signal based on the control signal. The peak RMS detector calculates a peak RMS of the replica gate signal. The comparator compares the peak RMS of the replica gate signal and a reference voltage and generates a comparator value. The counter is controlled by the comparator value to generate a compensation value used to adjust the gate driver and the replica gate driver. Other embodiments are also described and claimed.

摘要翻译： 显示系统包括像素显示面板，栅极驱动器和补偿单元。 栅极驱动器接收控制信号并且基于控制信号，产生栅极信号以驱动包括在像素中的晶体管。 补偿单元测量和补偿门驱动器的下降时间。 补偿单元包括复制栅极驱动器，峰值RMS检测器，比较器和计数器。 复制栅极驱动器基于控制信号产生复制门信号。 峰值RMS检测器计算复制门信号的峰值RMS。 比较器比较复制门信号的峰值RMS和参考电压，并产生比较器值。 计数器由比较器值控制，以产生用于调整栅极驱动器和复制栅极驱动器的补偿值。 还描述和要求保护其他实施例。

公开(公告)号：US08461934B1

公开(公告)日：2013-06-11

申请号：US13275782

申请日：2011-10-18

申请人： Ovidiu Carnu ,  Xiaoyue Wang ,  Shafiq M. Jamal

发明人： Ovidiu Carnu ,  Xiaoyue Wang ,  Shafiq M. Jamal

IPC分类号： H03L7/24

CPC分类号： H03L7/24 ,  G06F1/04 ,  H03B5/32 ,  H03K5/19

摘要： An IC includes first and second pads. The first pad is configured to receive an external clock. Alternatively, the first and second pads are configured to be coupled to a crystal oscillator and receive a reference clock. Alternatively, the second pad is configured to be grounded. The IC includes an internal oscillator for generating an internal clock, and an oscillator detector coupled to the second pad. The oscillator detector includes a transistor having a gate coupled to the second pad configured to pull a source-drain region to a first state if the second pad receives the reference clock or allow the source-drain region to be pulled to a second state if the second pad is grounded. The IC includes a buffer for transferring the first state to the internal oscillator for keeping the internal oscillator enabled and transferring the second state to the internal oscillator for disabling the internal oscillator.

摘要翻译： IC包括第一和第二焊盘。 第一个焊盘被配置为接收外部时钟。 或者，第一和第二焊盘被配置为耦合到晶体振荡器并接收参考时钟。 或者，第二垫被配置为接地。 IC包括用于产生内部时钟的内部振荡器和耦合到第二焊盘的振荡器检测器。 振荡器检测器包括具有耦合到第二焊盘的栅极的晶体管，其被配置为如果第二焊盘接收到参考时钟或者将源极 - 漏极区域拉至第二状态，则将源极 - 漏极区域拉至第一状态 第二垫接地。 IC包括用于将第一状态转移到内部振荡器以保持内部振荡器使能并将第二状态转移到内部振荡器以用于禁止内部振荡器的缓冲器。

公开(公告)号：US08436760B1

公开(公告)日：2013-05-07

申请号：US12882496

申请日：2010-09-15

申请人： Shingo Hatanaka ,  Shafiq M. Jamal ,  Hung Sheng Lin ,  Ovidiu Carnu

发明人： Shingo Hatanaka ,  Shafiq M. Jamal ,  Hung Sheng Lin ,  Ovidiu Carnu

IPC分类号： H03M1/38

CPC分类号： H03M1/34 ,  H03M1/38

摘要： The present disclosure includes systems and techniques relating to low power current-voltage mixed ADC architecture. In some implementations, an apparatus includes sample and hold circuitry, at least one ADC module configured to generate a first digital output based on a first analog input provided to the sample and hold circuitry, and current generation circuitry configured to modulate an analog output of the sample and hold circuitry to generate a residue output corresponding to the first analog input absent at least a portion corresponding to the first digital output, and to provide the residue output as a second analog input to further circuitry to generate a second digital output.

摘要翻译： 本公开包括与低功率电流 - 电压混合ADC架构相关的系统和技术。 在一些实现中，装置包括采样和保持电路，至少一个ADC模块被配置为基于提供给采样和保持电路的第一模拟输入产生第一数字输出，以及当前产生电路，其被配置为调制模拟输出 采样和保持电路以产生对应于第一模拟输入的残余输出，而不存在对应于第一数字输出的至少一部分，并且将剩余输出作为第二模拟输入提供给另外的电路以产生第二数字输出。

公开(公告)号：US20120286393A1

公开(公告)日：2012-11-15

申请号：US13465605

申请日：2012-05-07

申请人： Hung Sheng Lin ,  Shingo Hatanaka ,  Shafiq M. Jamal

发明人： Hung Sheng Lin ,  Shingo Hatanaka ,  Shafiq M. Jamal

IPC分类号： H01L29/92

CPC分类号： H01L23/5223 ,  H01L23/5225 ,  H01L23/5226 ,  H01L28/82 ,  H01L28/86 ,  H01L28/90 ,  H01L2924/0002 ,  H01L2924/00

摘要： A finger metal oxide metal (MOM) capacitor includes an outer conducting structure defined in a plurality of metal layers and a plurality of via layers of an integrated circuit. First and second side portions include a plurality of first and second finger sections extending in the plurality of metal layers and first and second hole vias connecting the first and second finger sections, respectively. A middle portion connects the first and second side portions. An inner conducting structure is defined in the plurality of metal layers and the plurality of via layers of the integrated circuit. A plurality of “T”-shaped sections are defined in the plurality of metal layers and third hole vias connecting the plurality of “T”-shaped sections. Middle portions of the plurality of “T”-shaped sections extend towards the middle portion and between the first side portion and the second side portion of the outer conducting structure.

摘要翻译： 手指金属氧化物金属（MOM）电容器包括限定在多个金属层中的外部导电结构和集成电路的多个通孔层。 第一和第二侧部分包括在多个金属层中延伸的多个第一和第二指状部分以及分别连接第一和第二指状部分的第一和第二通孔。 中间部分连接第一和第二侧部。 内部导电结构限定在集成电路的多个金属层和多个通孔层中。 在连接多个T形部分的多个金属层和第三孔通孔中限定多个T形部分。 多个T形部分的中部朝着外部导电结构的中间部分和第一侧部分和第二侧部分之间延伸。

公开(公告)号：US20120098570A1

公开(公告)日：2012-04-26

申请号：US13272560

申请日：2011-10-13

申请人： Xiaoyue Wang ,  Shafiq M. Jamal

发明人： Xiaoyue Wang ,  Shafiq M. Jamal

IPC分类号： H03D13/00

CPC分类号： H03L7/095 ,  H03L7/199

摘要： A lock signal indicating that a target signal is in phase with a reference signal includes detecting the reference signal at the rising and falling edges of the target signal. The target signal is detected on the rising and falling edges of the reference signal. An out of phase condition between the target and reference signals is used to place a timing means in a reset state. When the timing means is allowed to time out, a signal is asserted which indicates that the target signal is deemed to be locked to the reference signal.

摘要翻译： 指示目标信号与参考信号同相的锁定信号包括在目标信号的上升沿和下降沿检测参考信号。 在参考信号的上升沿和下降沿检测目标信号。 使用目标和参考信号之间的相位不同的状态将定时装置置于复位状态。 当定时装置被允许超时时，确定信号被指示目标信号被认为被锁定到参考信号。