公开(公告)号：US06393259B1

公开(公告)日：2002-05-21

申请号：US09260041

申请日：1999-03-02

申请人： Shigeo Kusunoki

发明人： Shigeo Kusunoki

IPC分类号： H04B144

CPC分类号： H04B1/525 ,  H03F1/342 ,  H03F2200/372

摘要： In an amplifier circuit and a transceiver, inter-modulation distortion caused by a transmission signal (S17) leaking from a transmission circuit (11) is eliminated without increasing the current output from the output terminal of an amplification element. An adjustment circuit constituted by connecting a phase rotation element (SL) and a resistive element (Rf) in series is connected between the input terminal and the output terminal of the amplification element (Q) and the rotation angle of the phase rotation element and the resistance value of the resistive element are set to desired values respectively. Therefore, it is possible to reduce inter-modulation distortion while preventing current consumption from increasing and thus, to prevent the reception sensitivity from deteriorating without increasing power consumption.

摘要翻译： 在放大器电路和收发器中，消除了从发送电路（11）泄漏的发送信号（S17）引起的互调失真，而不增加从放大元件的输出端子输出的电流。 将串联的相位旋转元件（SL）和电阻元件（Rf）构成的调整电路连接在放大元件（Q）的输入端子和输出端子与相位旋转元件的旋转角度 电阻元件的电阻值分别设定为期望值。 因此，可以在防止电流消耗增加的同时降低互调失真，从而防止接收灵敏度恶化而不增加功耗。

公开(公告)号：US07974597B2

公开(公告)日：2011-07-05

申请号：US11892724

申请日：2007-08-27

申请人： Shigeo Kusunoki

发明人： Shigeo Kusunoki

IPC分类号： H01Q11/12 ,  H04B1/04

CPC分类号： H03F1/3258 ,  H03F1/3276 ,  H03F3/189 ,  H03F3/68 ,  H04B1/0475

摘要： A power amplifier system includes a first power amplifier, a second harmonic generator, a phase shifter, and first and second adders. The first power amplifier amplifies a primary input signal. The second harmonic generator outputs a second harmonic by using a split part (signal) of the primary input signal as an input. The phase shifter adjusts a phase of the second harmonic. The first adder sums together a split signal of the primary input signal and an output of the phase shifter, thereby to produce an output. The second power amplifier uses the output of the first adder as an input. The second adder sums together an output of the first amplifier and an output of the second power amplifier, thereby to produce an output.

摘要翻译： 功率放大器系统包括第一功率放大器，二次谐波发生器，移相器以及第一和第二加法器。 第一功率放大器放大主输入信号。 二次谐波发生器通过使用主输入信号的分割部分（信号）作为输入来输出二次谐波。 移相器调节二次谐波的相位。 第一加法器将主输入信号的分割信号和移相器的输出相加，从而产生输出。 第二功率放大器使用第一加法器的输出作为输入。 第二加法器将第一放大器的输出和第二功率放大器的输出相加，从而产生输出。

公开(公告)号：US07400863B2

公开(公告)日：2008-07-15

申请号：US11056266

申请日：2005-02-14

申请人： Tomoo Kobayashi ,  Shigeo Kusunoki ,  Masayuki Shimada ,  Toshiyuki Koimori

发明人： Tomoo Kobayashi ,  Shigeo Kusunoki ,  Masayuki Shimada ,  Toshiyuki Koimori

IPC分类号： H04B1/44 ,  H04B1/38

CPC分类号： H03K17/693 ,  H03F1/0277 ,  H03F1/56 ,  H03F3/19 ,  H03F3/211 ,  H03F3/245 ,  H03F3/72 ,  H03F2200/222 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2203/21136 ,  H03F2203/21175 ,  H03G1/0088 ,  H03K17/162

摘要： A switch apparatus of the invention comprises a first input terminal, a second input terminal to which a second input signal having a level lower than a level of the first input signal is supplied, a first switch block for outputting the first input signal supplied from the first input terminal through a plurality of switching elements, a second switch block for outputting the second input signal supplied from the second input terminal through a plurality of switching elements; and a control terminal to which a control signal is supplied wherein the control signal controls the first switch block when outputting the first input signal, and controls the second switch block when outputting the second input signal, wherein the first switch block is configured to have a smaller number of switching elements than that of the second switch block.

摘要翻译： 本发明的开关装置包括：第一输入端，提供具有低于第一输入信号的电平的第二输入信号的第二输入端;第一开关块，用于输出从第一输入端输入的第一输入信号; 通过多个开关元件的第一输入端子;第二开关块，用于通过多个开关元件输出从第二输入端子提供的第二输入信号; 以及控制端子，其中提供控制信号，其中当输出第一输入信号时控制信号控制第一开关块，并且当输出第二输入信号时控制第二开关块，其中第一开关块被配置为具有 比第二开关块的开关元件数量少。

公开(公告)号：US20050186919A1

公开(公告)日：2005-08-25

申请号：US11056266

申请日：2005-02-14

申请人： Tomoo Kobayashi ,  Shigeo Kusunoki ,  Masayuki Shimada ,  Toshiyuki Koimori

发明人： Tomoo Kobayashi ,  Shigeo Kusunoki ,  Masayuki Shimada ,  Toshiyuki Koimori

IPC分类号： H03F1/02 ,  H03F3/21 ,  H03F3/24 ,  H03F3/60 ,  H03G1/00 ,  H03K17/16 ,  H03K17/693 ,  H02M3/335 ,  H04B1/44 ,  H04B1/04 ,  H01Q11/12

CPC分类号： H03K17/693 ,  H03F1/0277 ,  H03F1/56 ,  H03F3/19 ,  H03F3/211 ,  H03F3/245 ,  H03F3/72 ,  H03F2200/222 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2203/21136 ,  H03F2203/21175 ,  H03G1/0088 ,  H03K17/162

摘要： A switch apparatus of the invention comprises a first input terminal, a second input terminal to which a second input signal having a level lower than a level of the first input signal is supplied, a first switch block for outputting the first input signal supplied from the first input terminal through a plurality of switching elements, a second switch block for outputting the second input signal supplied from the second input terminal through a plurality of switching elements; and a control terminal to which a control signal is supplied wherein the control signal controls the first switch block when outputting the first input signal, and controls the second switch block when outputting the second input signal, wherein the first switch block is configured to have a smaller number of switching elements than that of the second switch block.

摘要翻译： 本发明的开关装置包括：第一输入端，提供具有低于第一输入信号的电平的第二输入信号的第二输入端;第一开关块，用于输出从第一输入端输入的第一输入信号; 通过多个开关元件的第一输入端子;第二开关块，用于通过多个开关元件输出从第二输入端子提供的第二输入信号; 以及控制端子，其中提供控制信号，其中当输出第一输入信号时控制信号控制第一开关块，并且当输出第二输入信号时控制第二开关块，其中第一开关块被配置为具有 比第二开关块的开关元件数量少。

公开(公告)号：US06466092B2

公开(公告)日：2002-10-15

申请号：US09882224

申请日：2001-06-15

申请人： Shigeo Kusunoki

发明人： Shigeo Kusunoki

IPC分类号： H03F126

CPC分类号： H03F1/3247 ,  H03F1/3282 ,  H03F2200/102

摘要： A distortion compensation method and apparatus for compensating distortion components of a device, such as a power amplifier, wherein should distortion persist in an output of the power amplifier 23, only distortion components are represented on subtracted results S40. These subtracted results S40 are summed to data written in a random access memory 17 with a signal S3 as an address, and are again written in a second memory 17. The data in the random access memory 17 provide an address for a next following third memory 19 to help output data S44 stored in the third memory 19. These data S44 in the third memory are summed by an adder 7 provided in an amplitude distortion correction channel to amplitude correct data in the first memory 6. The resulting sum data is input to the power amplifier 23 desired to be compensated to contribute to correction of the amplitude distortion.

摘要翻译： 一种用于补偿诸如功率放大器的设备的失真分量的失真补偿方法和装置，其中应该在功率放大器23的输出中存在失真，在减去的结果S40中仅表示失真分量。 将这些减法结果S40与以随机存取存储器17写入的数据相加，信号S3作为地址，并被再次写入第二存储器17.随机存取存储器17中的数据为下一个后续第三存储器提供地址 以帮助存储在第三存储器19中的输出数据S44。第三存储器中的这些数据S44由设置在幅度失真校正通道中的加法器7与第一存储器6中的幅度校正数据相加。所得到的和数据被输入到 功率放大器23希望被补偿以有助于校正幅度失真。

公开(公告)号：US5406151A

公开(公告)日：1995-04-11

申请号：US122840

申请日：1993-09-15

申请人： Shigeo Kusunoki

发明人： Shigeo Kusunoki

IPC分类号： H01P1/15 ,  H03K17/00 ,  H03K17/687

CPC分类号： H03K17/687 ,  H03K2217/0036

摘要： A semiconductor switching circuit for operation at low battery voltages as in, for example, battery powered telephone devices. The semiconductor switching circuit includes first and second field effect transistors. Three power supplies are provided. The first power supply outputs a voltage V.sub.o. The second power supply outputs a voltage which is no lower than the sum of V.sub.o and the built in voltage of the field effect transistors. The third power outputs a voltage which is not higher than the sum of V.sub.o and the pinchoff voltage of the field effect transistors. The source of the first field effect transistor serves as the circuits input while its drain serves as the circuit's output. This output is connected to the drain of the second transistor. The first power supply provides bias to the first and second field effect transistors. This arrangement provides low input loss and high isolation.

摘要翻译： 一种半导体开关电路，用于在例如电池供电的电话设备中以低电池电压工作。 半导体开关电路包括第一和第二场效应晶体管。 提供三个电源。 第一个电源输出一个电压Vo。 第二电源输出不低于场效应晶体管的Vo和内置电压之和的电压。 第三功率输出不高于场效应晶体管的Vo和压抑电压之和的电压。 第一场效应晶体管的源极用作电路输入，而其漏极用作电路的输出。 该输出连接到第二晶体管的漏极。 第一电源为第一和第二场效应晶体管提供偏置。 这种布置提供低输入损耗和高隔离度。

公开(公告)号：US08406824B2

公开(公告)日：2013-03-26

申请号：US12614529

申请日：2009-11-09

申请人： Hirotada Taniuchi ,  Shigeo Kusunoki ,  Tetsuo Kimura ,  Akihito Kato ,  Kazuhiko Saito

发明人： Hirotada Taniuchi ,  Shigeo Kusunoki ,  Tetsuo Kimura ,  Akihito Kato ,  Kazuhiko Saito

IPC分类号： H04M1/00

CPC分类号： H02M3/07 ,  H02J7/345

摘要： A wireless communication apparatus includes a power-supply apparatus configured to supply electric power to a load that is intermittently operated by using a battery as a power supply; and a control unit configured to control the power-supply apparatus, wherein the power-supply apparatus includes a capacitor; a switching unit capable of selectively forming a first path through which charging is performed from the battery to the capacitor and a second path through which the battery is connected in series with the capacitor, and wherein the control unit controls the switching unit so that the first path is formed during a period in which the load is idle and the second path is formed during a period in which the load is not idle, and thereby supplies the voltage of the sum of the battery voltage and the charged voltage of the capacitor in a non-idle period.

摘要翻译： 无线通信装置包括：电源装置，被配置为向通过使用电池作为电源间歇地操作的负载提供电力; 以及控制单元，被配置为控制所述电源装置，其中所述电源装置包括电容器; 开关单元，其能够选择性地形成从电池到电容器进行充电的第一路径和电池与电容器串联连接的第二路径，并且其中控制单元控制开关单元，使得第一 在负载不空闲的时段期间形成路径，并且在负载不空闲的时段期间形成第二路径，从而将电池电压和电容器的充电电压之和的电压提供到 非空闲时段

公开(公告)号：US20080058001A1

公开(公告)日：2008-03-06

申请号：US11892724

申请日：2007-08-27

申请人： Shigeo Kusunoki

发明人： Shigeo Kusunoki

IPC分类号： H04B1/38 ,  H03F3/16 ,  H03F3/68

CPC分类号： H03F1/3258 ,  H03F1/3276 ,  H03F3/189 ,  H03F3/68 ,  H04B1/0475

摘要： A power amplifier system includes a first power amplifier, a second harmonic generator, a phase shifter, and first and second adders. The first power amplifier amplifies a primary input signal. The second harmonic generator outputs a second harmonic by using a split part (signal) of the primary input signal as an input. The phase shifter adjusts a phase of the second harmonic. The first adder sums together a split signal of the primary input signal and an output of the phase shifter, thereby to produce an output. The second power amplifier uses the output of the first adder as an input. The second adder sums together an output of the first amplifier and an output of the second power amplifier, thereby to produce an output.

摘要翻译： 功率放大器系统包括第一功率放大器，二次谐波发生器，移相器以及第一和第二加法器。 第一功率放大器放大主输入信号。 二次谐波发生器通过使用主输入信号的分割部分（信号）作为输入来输出二次谐波。 移相器调节二次谐波的相位。 第一加法器将主输入信号的分割信号和移相器的输出相加，从而产生输出。 第二功率放大器使用第一加法器的输出作为输入。 第二加法器将第一放大器的输出和第二功率放大器的输出相加，从而产生输出。

公开(公告)号：US07330518B2

公开(公告)日：2008-02-12

申请号：US10825914

申请日：2004-04-16

申请人： Shigeo Kusunoki

发明人： Shigeo Kusunoki

IPC分类号： H04K1/02

CPC分类号： H03F1/3252

摘要： Predistortion effective for a power amplifier with the memory effect is provided. An A/D converter digitizes a signal voltage value after quadrature modulation, and the result is supplied to a subtractor. A lookup table outputs voltage value data in accordance with an output of the subtractor. The output of the lookup table is used as address data for accessing respective lookup tables. The lookup tables output an accumulation adding value derived from multiplying, by impulse responses, the signal voltage value after quadrature modulation and supplies it to the subtractor. The voltage value data outputted from the lookup table is converted by a D/A converter to output it as a predistortion signal for amplitude component for the power amplifier.

摘要翻译： 提供了对具有记忆效应的功率放大器有效的预失真。 A / D转换器对正交调制后的信号电压值进行数字化，并将结果提供给减法器。 查找表根据减法器的输出输出电压值数据。 查找表的输出用作访问各个查找表的地址数据。 查找表输出通过脉冲响应乘以正交调制后的信号电压值而得到的积累相加值，并将其提供给减法器。 从查找表输出的电压值数据由D / A转换器转换，以将其作为用于功率放大器的幅度分量的预失真信号输出。

公开(公告)号：US20050212595A1

公开(公告)日：2005-09-29

申请号：US11045262

申请日：2005-01-31

申请人： Shigeo Kusunoki ,  Katsuji Kawakami

发明人： Shigeo Kusunoki ,  Katsuji Kawakami

IPC分类号： H03F1/32 ,  H03F3/24 ,  H04B1/04 ,  H03F1/26

CPC分类号： H03F1/3276

摘要： One divided signal divided into two by a dividing circuit is inputted to a gate of a source grounded FET through a first matching circuit. In a drain of the FET, a second harmonic having a phase and an amplitude in accordance with an impedance of the first matching circuit is generated and extracted in a band pass filter and then the amplitude is adjusted in an attenuation circuit to input to an addition circuit through a second matching circuit. In the addition circuit, the output of the second matching circuit is added to another divided signal of the dividing circuit and inputted to a power amplifier. The impedance in the first matching circuit affecting the phase of the second harmonic generated from the FET is set so that a distortion component generated in the power amplifier is compensated for by the second harmonic inputted in the addition circuit.

摘要翻译： 通过分频电路将二分频信号通过第一匹配电路输入到源极接地FET的栅极。 在FET的漏极中，在带通滤波器中产生并提取具有根据第一匹配电路的阻抗的相位和幅度的二次谐波，然后在衰减电路中调整振幅以输入到加法 电路通过第二匹配电路。 在加法电路中，将第二匹配电路的输出添加到除法电路的另一分频信号并输入功率放大器。 影响从FET产生的二次谐波的相位的第一匹配电路中的阻抗被设定为使得在功率放大器中产生的失真分量由输入到加法电路中的二次谐波补偿。