公开(公告)号：US10140026B2

公开(公告)日：2018-11-27

申请号：US15286925

申请日：2016-10-06

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F3/06 ,  G06F12/02 ,  G06F12/0871

Abstract: The present invention provides a data storage device including a flash memory and a random access memory. The flash memory has a data mapping table arranged to record a plurality of mapping relationships between the logical addresses and the physical addresses of a plurality of pages of the flash memory. The data mapping table is divided into a plurality of data mapping sets. The random access memory has a cache area, a sequential-order table, a reverse-order table and a cache-area mapping table. The cache area stores part of the data mapping sets. The cache-area mapping table records the set indexes of the data mapping sets of the cache area. The sequential-order table records the order that the data mapping sets are read from the cache area. The reverse-order table records the opposite order that the data mapping sets are read from the cache area.

公开(公告)号：US10073769B2

公开(公告)日：2018-09-11

申请号：US15613342

申请日：2017-06-05

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F12/02 ,  G06F12/0875 ,  G06F3/06

CPC classification number: G06F12/0246 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/0871 ,  G06F12/0875 ,  G06F2206/1014 ,  G06F2212/1016 ,  G06F2212/214 ,  G06F2212/466 ,  G06F2212/7201

Abstract: The present invention provides a data storage device including a random access memory and a controller. The random access memory has a cache area. The controller loads a part of data mapping sets of the data mapping table on a plurality of sectors of the cache area, wherein any of the data mapping sets that has been read less than a predetermined number of times is defined as an infrequent data mapping set, and any of the data mapping sets that has been read more than the predetermined number of times is defined as a frequent data mapping set.

公开(公告)号：US09690661B2

公开(公告)日：2017-06-27

申请号：US14614447

申请日：2015-02-05

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F11/00 ,  G06F11/14 ,  G06F13/00 ,  G11C11/56 ,  G11C16/34 ,  G11C29/42 ,  G11C29/52

CPC classification number: G06F11/1402 ,  G06F11/14 ,  G06F11/1441 ,  G06F13/00 ,  G11C11/5642 ,  G11C16/3404 ,  G11C16/3418 ,  G11C29/42 ,  G11C29/52

Abstract: For single-level cell flash memories and multi-level cell flash memories, different operations can be performed according to their stability when an abnormal status is terminated. Specifically, for the multi-level cell flash memories, when the abnormal status is terminated, a now physical block is used to proceed with write operation, and the previous physical block(s) would not be written any more. On the contrary, for the single-level cell flash memories, when the abnormal status is terminated, the controller needs to perform corresponding operations on the last physical page of the previous physical block(s).

公开(公告)号：US11580017B2

公开(公告)日：2023-02-14

申请号：US17160850

申请日：2021-01-28

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F12/02 ,  G06F12/10

Abstract: The invention relates to a method, a non-transitory computer program product, and an apparatus for managing data storage. The method performed by a flash controller includes: obtaining information indicating a subregion to be activated, where the subregion is associated with a logical block address (LBA) range; triggering a garbage collection (GC) process being performed in background to migrate user data of all the or a portion of the LBA range associated with the subregion to continuous physical addresses in a flash device; and updating content of a plurality of entries associated with the subregion according to migration results, where each entry includes information indicating which physical address that user data of a corresponding logical address is physically stored in the flash device.

公开(公告)号：US11307786B2

公开(公告)日：2022-04-19

申请号：US16849333

申请日：2020-04-15

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F3/06 ,  G06F16/11

Abstract: A data storage device includes a memory device and a memory controller. The memory controller configures a first predetermined memory block and a second predetermined memory block as buffers to receive data from a host device and determines to use the first or the second predetermined memory block to receive the data according to write addresses of a write command received from the host device. When the write addresses indicate that the data to be written by the host device is management data of a file system of the host device, the memory controller writes the data to the first predetermined memory block. When the write addresses indicate that the data to be written by the host device is not the management data of the file system of the host device, the memory controller writes the data to the second predetermined memory block.

公开(公告)号：US11307766B2

公开(公告)日：2022-04-19

申请号：US17026632

申请日：2020-09-21

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F3/06

Abstract: The invention relates to an apparatus, a method, and a non-transitory computer program product for programming flash administration tables. The non-transitory computer program product includes program code to: periodically determine whether user data that has been programmed into a current block of a flash module satisfies a random-write condition; and update a record of a host-to-flash (H2F) sub-table according to content of a flash-to-host (F2H) table for the current block when user data that has been programmed into the current block of the flash module satisfies the random-write condition.

公开(公告)号：US11176035B2

公开(公告)日：2021-11-16

申请号：US16831026

申请日：2020-03-26

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F12/02 ,  G06F12/0882 ,  G06F13/16

Abstract: A data storage device includes a memory device and a memory controller. The memory device includes multiple memory blocks. The memory controller determines whether execution of a garbage collection procedure is required according to a number of spare memory blocks. When the execution of the garbage collection procedure is required, the memory controller determines an execution period according to a latest editing status of a plurality of open memory blocks; starts the execution of the garbage collection procedure so as to perform at least a portion of the garbage collection procedure in the execution period; and suspends the execution of the garbage collection procedure when the execution period has expired but the garbage collection procedure is not finished. The memory controller further determines a time interval for continuing the execution of the garbage collection procedure later according to the latest editing status of the open memory blocks.

公开(公告)号：US11176033B2

公开(公告)日：2021-11-16

申请号：US16849294

申请日：2020-04-15

Applicant: Silicon Motion, Inc.

Inventor： Kuan-Yu Ke

IPC: G06F12/02 ,  G06F12/0882 ,  G06F12/0804 ,  G06F13/16 ,  G06F12/0873

Abstract: A data storage device includes a memory device and a memory controller. The memory controller selects a predetermined memory block to receive data and accordingly records multiple logical addresses in a first mapping table. When the predetermined memory block is full, the memory controller edits a second mapping table or a third mapping table based on the first mapping table. The memory controller determines whether the first mapping table has recorded logical addresses of a predetermined number of consecutive logical pages. If not, the memory controller edits the second mapping table. If so, the memory controller skips editing the second mapping table and edits the third mapping table instead, so as to record the mapping information of a predetermined logical page among the predetermined number of consecutive logical pages as representative mapping information in a corresponding field of the third mapping table.

公开(公告)号：US10474573B2

公开(公告)日：2019-11-12

申请号：US16006854

申请日：2018-06-13

Applicant: Silicon Motion Inc.

Inventor： Kuan-Yu Ke

IPC: G06F12/00 ,  G06F12/02 ,  G06F3/06

Abstract: A method for managing a flash memory module, an associated flash memory controller and an associated electronic device are provided, wherein the method includes: when the flash memory module is powered on, and a garbage collection operation is not finished before the flash memory module is powered on: determining a progress of the garbage collection operation to generate a determination result; and determining to discard a target block in the garbage collection operation or to write dummy data into remaining pages of the target block according to the determination result.

公开(公告)号：US20190227926A1

公开(公告)日：2019-07-25

申请号：US16006854

申请日：2018-06-13

Applicant: Silicon Motion Inc.

Inventor： Kuan-Yu Ke

IPC: G06F12/02 ,  G06F3/06

Abstract: A method for managing a flash memory module, an associated flash memory controller and an associated electronic device are provided, wherein the method includes: when the flash memory module is powered on, and a garbage collection operation is not finished before the flash memory module is powered on: determining a progress of the garbage collection operation to generate a determination result; and determining to discard a target block in the garbage collection operation or to write dummy data into remaining pages of the target block according to the determination result.