公开(公告)号：US20070284609A1

公开(公告)日：2007-12-13

申请号：US11423649

申请日：2006-06-12

申请人： Boon-Aik Ang ,  Nian Yang ,  Yonggang Wu

发明人： Boon-Aik Ang ,  Nian Yang ,  Yonggang Wu

IPC分类号： H01L29/74

CPC分类号： G11C16/30 ,  G11C5/145 ,  H02M3/07

摘要： A method and apparatus are provided for improved power conservation in a semiconductor device (100) which includes a high voltage generating circuit (200) such as a drain pump. The operation frequency of the drain pump (200) is controlled in response to the high voltage level detected at the output thereof. In addition, highly efficient operation of the drain pump (200) can be achieved by enabling and disabling the drain pump (200) in response to the high voltage level to provide an output signal at a relatively constant high voltage level. The drain pump (200) is enabled in response to a high voltage detector (202, 402, 502) detecting a high voltage level lower than a first predetermined voltage level and is disabled in response to detecting a voltage level higher than a second predetermined voltage level, the second predetermined voltage level being higher than the first predetermined voltage level.

摘要翻译： 提供了一种用于在包括诸如排水泵的高电压产生电路（200）的半导体器件（100）中改善功率节省的方法和装置。 排水泵（200）的运转频率根据其输出端检测到的高电压电平进行控制。 此外，可以通过响应于高电压电平启用和禁用排水泵（200）来实现排水泵（200）的高效率操作，以在相对恒定的高电压电平提供输出信号。 响应于检测到低于第一预定电压电平的高电压电平的高电压检测器（202,402,502）响应于检测到高于第二预定电压的电压电平而禁用排水泵（200） 电平，第二预定电压电平高于第一预定电压电平。

公开(公告)号：US07009548B2

公开(公告)日：2006-03-07

申请号：US11011510

申请日：2004-12-14

申请人： Meei-Ling Chiang ,  Boon-Aik Ang

发明人： Meei-Ling Chiang ,  Boon-Aik Ang

IPC分类号： H03M1/38

CPC分类号： H03M1/007 ,  H03M1/0695 ,  H03M1/167 ,  H03M1/44

摘要： A pipeline ADC (Analog to Digital Converter) unit is provided that has a first and a second multi-stage portion. The first multi-stage portion has a first plurality of converter stages for converting a first analog signal to a first digital signal having a first digital resolution. The second portion has a second plurality of converter stages to convert a second analog signal to a second digital signal having a second digital resolution. The second plurality includes the first plurality. The pipeline ADC unit selectively uses either the first plurality of stages alone, or the second plurality. The pipeline ADC unit may be used in a WLAN (Wireless Local Area Network) communication device.

摘要翻译： 提供了具有第一和第二多级部分的流水线ADC（模数转换器）单元。 第一多级部分具有用于将第一模拟信号转换为具有第一数字分辨率的第一数字信号的第一多个转换器级。 第二部分具有第二多个转换器级，以将第二模拟信号转换成具有第二数字分辨率的第二数字信号。 第二多个包括第一多个。 流水线ADC单元选择性地使用单独的第一多个级或第二级。 流水线ADC单元可用于WLAN（无线局域网）通信设备中。

公开(公告)号：US06380806B1

公开(公告)日：2002-04-30

申请号：US09653670

申请日：2000-09-01

申请人： Boon-Aik Ang

发明人： Boon-Aik Ang

IPC分类号： H03F345

CPC分类号： H03F3/4565 ,  H03F3/45188 ,  H03F3/45708 ,  H03F3/45977 ,  H03F2203/45421 ,  H03F2203/45651

摘要： The present invention provides a fully differential telescopic operational amplifier having a switch capacitor common mode feedback (CMFB) circuit portion. The switched capacitor CMFB circuit portion has a current mirror for mirroring current from a first transistor to a second transistor. The first and second transistors have gates which are coupled via a transmission gate switch. Drains of each of the first and second transistors are respectively coupled to a first and a second differential pair of transistors, each differential pair connected to receive a common mode voltage and drains of the first differential pair connected to the gate of the first transistor. The first and second differential pair are scaled with respect to each other such that the gate to source voltage of the first transistor is substantially equal to the gate to source voltage of the second transistor.

摘要翻译： 本发明提供了具有开关电容共模反馈（CMFB）电路部分的全差分伸缩运算放大器。 开关电容器CMFB电路部分具有用于将电流从第一晶体管镜像到第二晶体管的电流镜。 第一和第二晶体管具有通过传输门开关耦合的栅极。 第一和第二晶体管中的每一个的漏极分别耦合到第一和第二差分对晶体管，每个差分对被连接以接收连接到第一晶体管的栅极的第一差分对的共模电压和漏极。 第一和第二差分对相对于彼此被缩放，使得第一晶体管的栅极 - 源极电压基本上等于第二晶体管的栅极 - 源极电压。