公开(公告)号：US20080130371A1

公开(公告)日：2008-06-05

申请号：US11950811

申请日：2007-12-05

申请人： Nian Yang ,  Boon-Aik Ang ,  Yonggang Wu ,  Guowei Wang ,  Fan Wan Lai

发明人： Nian Yang ,  Boon-Aik Ang ,  Yonggang Wu ,  Guowei Wang ,  Fan Wan Lai

IPC分类号： G11C16/12 ,  G11C16/28

CPC分类号： G11C7/1039 ,  G11C8/08 ,  G11C16/0475 ,  G11C16/0491 ,  G11C16/08 ,  G11C16/30 ,  G11C2207/2245

摘要： A method and apparatus are provided for high performance, high voltage memory operations on selected memory cells (200) of a semiconductor memory device (100). A high voltage generator (106) during program or erase operations provides a continuous high voltage level (702) on selected word lines (502) and maintains a continuous high voltage level supply to a bit line decoder (120) which sequentially provides the high voltage level (706) to a first portion of bit lines (504) and discharges (708) those bit lines (504) before providing the high voltage level to a second portion (710). For additional improvements to program operations, the high voltage generator (106) decouples high voltages provided to the word lines (502) and the bit lines (504) by providing a current flow control device (1208) therebetween and provides a boosting voltage at a time (1104) to overcome a voltage level drop (1102) resulting from a capacitor load associated with selected bit lines (504) and/or the bit line decoder (120) precharges (1716) a second portion of the bit lines (504) while providing a high voltage level to a first portion to program (1706) a first portion of memory cells (200). For improvements to read operations, whether dynamic reference cells (2002) are blank is determined by providing non-identically regulated high voltage levels from a first voltage source (2112) to the dynamic reference cells (2002) and from a second voltage source (2104) to static reference cells (2004) and, if the dynamic reference cells (2002) are not blank, reads selected memory cells (200) by providing identically regulated high voltage levels to the selected memory cells (200), the dynamic reference cells (2002) and the static reference cells (2004).

公开(公告)号：US20070286006A1

公开(公告)日：2007-12-13

申请号：US11423645

申请日：2006-06-12

申请人： Yonggang Wu ,  Nian Yang ,  Boon-Aik Ang

发明人： Yonggang Wu ,  Nian Yang ,  Boon-Aik Ang

IPC分类号： G11C5/14

CPC分类号： G11C5/145

摘要： A method and apparatus are provided for improved noise reduction from switching on and off drain pumps (202) in a high voltage generator. The drain pumps (202) are divided into groups (204) and activation of the groups (204) of drain pumps (202) is staggered (304, 310). In addition, when drain pumps are switched on and off for power conservation or to maintain a steady state high voltage level, the groups (204) of drain pumps (202) are switched on and off in response to various predetermined high voltage levels (410, 412, 414, 416), with different voltage levels for different groups (204) of drain pumps (202).

摘要翻译： 提供了一种方法和装置，用于从高压发生器中的接通和关闭排放泵（202）的开关中减少噪音。 排水泵（202）被分成组（204），并且排水泵（202）的组（204）的活动是交错的（304,310）。 此外，当排水泵被接通和关闭以进行节能或保持稳定状态的高电压电平时，排水泵（202）的组（204）响应于各种预定的高电压电平（410）被接通和断开 ，412,414,416），具有用于不同组（204）排水泵（202）的不同电压电平。

公开(公告)号：US07355904B2

公开(公告)日：2008-04-08

申请号：US11423645

申请日：2006-06-12

申请人： Yonggang Wu ,  Nian Yang ,  Boon-Aik Ang

发明人： Yonggang Wu ,  Nian Yang ,  Boon-Aik Ang

IPC分类号： G11C7/00

CPC分类号： G11C5/145

摘要： A method and apparatus are provided for improved noise reduction from switching on and off drain pumps (202) in a high voltage generator. The drain pumps (202) are divided into groups (204) and activation of the groups (204) of drain pumps (202) is staggered (304, 310). In addition, when drain pumps are switched on and off for power conservation or to maintain a steady state high voltage level, the groups (204) of drain pumps (202) are switched on and off in response to various predetermined high voltage levels (410, 412, 414, 416), with different voltage levels for different groups (204) of drain pumps (202).

摘要翻译： 提供了一种方法和装置，用于从高压发生器中的接通和关闭排放泵（202）的开启和关闭状态改进降噪。 排水泵（202）被分成组（204），并且排水泵（202）的组（204）的活动是交错的（304,310）。 此外，当排水泵被接通和关闭以进行节能或保持稳定状态的高电压电平时，排水泵（202）的组（204）响应于各种预定的高电压电平（410）被接通和断开 ，412,414,416），具有用于不同组（204）排水泵（202）的不同电压电平。

公开(公告)号：US07345916B2

公开(公告)日：2008-03-18

申请号：US11423638

申请日：2006-06-12

申请人： Nian Yang ,  Boon-Aik Ang ,  Yonggang Wu ,  Guowei Wang ,  Fan Wan Lai

发明人： Nian Yang ,  Boon-Aik Ang ,  Yonggang Wu ,  Guowei Wang ,  Fan Wan Lai

IPC分类号： G11C16/04 ,  G11C16/06 ,  G11C5/14 ,  G11C7/00

CPC分类号： G11C7/1039 ,  G11C8/08 ,  G11C16/0475 ,  G11C16/0491 ,  G11C16/08 ,  G11C16/30 ,  G11C2207/2245

摘要： A method and apparatus are provided for high performance, high voltage memory operations on selected memory cells (200) of a semiconductor memory device (100). A high voltage generator (106) during program or erase operations provides a continuous high voltage level (702) on selected word lines (502) and maintains a continuous high voltage level supply to a bit line decoder (120) which sequentially provides the high voltage level (706) to a first portion of bit lines (504) and discharges (708) those bit lines (504) before providing the high voltage level to a second portion (710).For additional improvements to program operations, the high voltage generator (106) decouples high voltages provided to the word lines (502) and the bit lines (504) by providing a current flow control device (1208) therebetween and provides a boosting voltage at a time (1104) to overcome a voltage level drop (1102) resulting from a capacitor load associated with selected bit lines (504) and/or the bit line decoder (120) precharges (1716) a second portion of the bit lines (504) while providing a high voltage level to a first portion to program (1706) a first portion of memory cells (200).For improvements to read operations, whether dynamic reference cells (2002) are blank is determined by providing non-identically regulated high voltage levels from a first voltage source (2112) to the dynamic reference cells (2002) and from a second voltage source (2104) to static reference cells (2004) and, if the dynamic reference cells (2002) are not blank, reads selected memory cells (200) by providing identically regulated high voltage levels to the selected memory cells (200), the dynamic reference cells (2002) and the static reference cells (2004).

公开(公告)号：US20070291550A1

公开(公告)日：2007-12-20

申请号：US11423638

申请日：2006-06-12

申请人： Nian Yang ,  Boon-Aik Ang ,  Yonggang Wu ,  Guowei Wang ,  Fan Wan Lai

发明人： Nian Yang ,  Boon-Aik Ang ,  Yonggang Wu ,  Guowei Wang ,  Fan Wan Lai

IPC分类号： G11C11/34 ,  G11C16/04 ,  G11C8/00 ,  G11C7/00 ,  G11C16/06

CPC分类号： G11C7/1039 ,  G11C8/08 ,  G11C16/0475 ,  G11C16/0491 ,  G11C16/08 ,  G11C16/30 ,  G11C2207/2245

摘要： A method and apparatus are provided for high performance, high voltage memory operations on selected memory cells (200) of a semiconductor memory device (100). A high voltage generator (106) during program or erase operations provides a continuous high voltage level (702) on selected word lines (502) and maintains a continuous high voltage level supply to a bit line decoder (120) which sequentially provides the high voltage level (706) to a first portion of bit lines (504) and discharges (708) those bit lines (504) before providing the high voltage level to a second portion (710).For additional improvements to program operations, the high voltage generator (106) decouples high voltages provided to the word lines (502) and the bit lines (504) by providing a current flow control device (1208) therebetween and provides a boosting voltage at a time (1104) to overcome a voltage level drop (1102) resulting from a capacitor load associated with selected bit lines (504) and/or the bit line decoder (120) precharges (1716) a second portion of the bit lines (504) while providing a high voltage level to a first portion to program (1706) a first portion of memory cells (200).For improvements to read operations, whether dynamic reference cells (2002) are blank is determined by providing non-identically regulated high voltage levels from a first voltage source (2112) to the dynamic reference cells (2002) and from a second voltage source (2104) to static reference cells (2004) and, if the dynamic reference cells (2002) are not blank, reads selected memory cells (200) by providing identically regulated high voltage levels to the selected memory cells (200), the dynamic reference cells (2002) and the static reference cells (2004).

公开(公告)号：US07613044B2

公开(公告)日：2009-11-03

申请号：US11950811

申请日：2007-12-05

申请人： Nian Yang ,  Boon-Aik Ang ,  Yonggang Wu ,  Guowei Wang ,  Fan Wan Lai

发明人： Nian Yang ,  Boon-Aik Ang ,  Yonggang Wu ,  Guowei Wang ,  Fan Wan Lai

IPC分类号： G11C11/34 ,  G11C16/04 ,  G11C16/06 ,  G11C7/10

CPC分类号： G11C7/1039 ,  G11C8/08 ,  G11C16/0475 ,  G11C16/0491 ,  G11C16/08 ,  G11C16/30 ,  G11C2207/2245

摘要： A method and apparatus are provided for high performance, high voltage memory operations on selected memory cells (200) of a semiconductor memory device (100). A high voltage generator (106) during program or erase operations provides a continuous high voltage level (702) on selected word lines (502) and maintains a continuous high voltage level supply to a bit line decoder (120) which sequentially provides the high voltage level (706) to a first portion of bit lines (504) and discharges (708) those bit lines (504) before providing the high voltage level to a second portion (710). For additional improvements to program operations, the high voltage generator (106) decouples high voltages provided to the word lines (502) and the bit lines (504) by providing a current flow control device (1208) therebetween and provides a boosting voltage at a time (1104) to overcome a voltage level drop (1102) resulting from a capacitor load associated with selected bit lines (504) and/or the bit line decoder (120) precharges (1716) a second portion of the bit lines (504) while providing a high voltage level to a first portion to program (1706) a first portion of memory cells (200). For improvements to read operations, whether dynamic reference cells (2002) are blank is determined by providing non-identically regulated high voltage levels from a first voltage source (2112) to the dynamic reference cells (2002) and from a second voltage source (2104) to static reference cells (2004) and, if the dynamic reference cells (2002) are not blank, reads selected memory cells (200) by providing identically regulated high voltage levels to the selected memory cells (200), the dynamic reference cells (2002) and the static reference cells (2004).

摘要翻译： 提供了一种用于在半导体存储器件（100）的选定存储单元（200）上进行高性能，高电压存储器操作的方法和装置。 在编程或擦除操作期间，高电压发生器（106）在所选择的字线（502）上提供连续的高电压电平（702），并且向位线解码器（120）保持连续的高电压电平供应，位线解码器（120）依次提供高电压 电平（706）到位线（504）的第一部分，并且在将高电压电平提供给第二部分（710）之前对那些位线（504）进行放电（708）。 为了对编程操作进一步改进，高电压发生器（106）通过在其间提供电流控制装置（1208）来解耦提供给字线（502）和位线（504）的高电压，并在 时间（1104）以克服由与所选位线（504）和/或位线解码器（120）相关联的电容器负载导致的电压电平下降（1102），所述位线（504）的第二部分预充电（1716） 同时向第一部分提供高电压电平以对存储单元（200）的第一部分进行编程（1706）。 为了改进读取操作，动态参考单元（2002）是空白的是通过从第一电压源（2112）到动态参考单元（2002）和从第二电压源（2104）提供非相同调节的高电压电平来确定的 ）到静态参考单元（2004），并且如果动态参考单元（2002）不为空白，则通过向所选择的存储单元（200），动态参考单元（200）提供相同调节的高电压电平来读取所选存储单元（200） 2002）和静态参考单元（2004）。

公开(公告)号：US20070284609A1

公开(公告)日：2007-12-13

申请号：US11423649

申请日：2006-06-12

申请人： Boon-Aik Ang ,  Nian Yang ,  Yonggang Wu

发明人： Boon-Aik Ang ,  Nian Yang ,  Yonggang Wu

IPC分类号： H01L29/74

CPC分类号： G11C16/30 ,  G11C5/145 ,  H02M3/07

摘要： A method and apparatus are provided for improved power conservation in a semiconductor device (100) which includes a high voltage generating circuit (200) such as a drain pump. The operation frequency of the drain pump (200) is controlled in response to the high voltage level detected at the output thereof. In addition, highly efficient operation of the drain pump (200) can be achieved by enabling and disabling the drain pump (200) in response to the high voltage level to provide an output signal at a relatively constant high voltage level. The drain pump (200) is enabled in response to a high voltage detector (202, 402, 502) detecting a high voltage level lower than a first predetermined voltage level and is disabled in response to detecting a voltage level higher than a second predetermined voltage level, the second predetermined voltage level being higher than the first predetermined voltage level.

摘要翻译： 提供了一种用于在包括诸如排水泵的高电压产生电路（200）的半导体器件（100）中改善功率节省的方法和装置。 排水泵（200）的运转频率根据其输出端检测到的高电压电平进行控制。 此外，可以通过响应于高电压电平启用和禁用排水泵（200）来实现排水泵（200）的高效率操作，以在相对恒定的高电压电平提供输出信号。 响应于检测到低于第一预定电压电平的高电压电平的高电压检测器（202,402,502）响应于检测到高于第二预定电压的电压电平而禁用排水泵（200） 电平，第二预定电压电平高于第一预定电压电平。

公开(公告)号：US20080122413A1

公开(公告)日：2008-05-29

申请号：US11423643

申请日：2006-06-12

申请人： Boon-Aik Ang ,  Nian Yang ,  Yonggang Wu

发明人： Boon-Aik Ang ,  Nian Yang ,  Yonggang Wu

IPC分类号： G05F1/10 ,  G01R19/00

CPC分类号： G11C5/143 ,  G01R19/16552

摘要： A method and apparatus are provided for versatile high voltage level detection. A semiconductor device (100) is provided which includes a high voltage generating circuit (202) for generating a high voltage supply signal having a high voltage level and a voltage level detector (204) coupled to the output of the high voltage generating circuit (202) and including a current source (402) for generating a current to increase the voltage margin of the voltage level detector (204), the voltage level detector (204) generating a voltage control signal in response to the current and the high voltage level detected.

摘要翻译： 提供了用于通用的高电压电平检测的方法和装置。 提供一种半导体器件（100），其包括用于产生具有高电压电平的高电压电源信号的高电压产生电路（202）和耦合到高电压发生电路（202）的输出的电压电平检测器（204） ），并且包括用于产生电流以增加电压电平检测器（204）的电压余量的电流源（402），电压电平检测器（204）响应于检测到的电流和高电压产生电压控制信号 。

公开(公告)号：US07948820B2

公开(公告)日：2011-05-24

申请号：US11951262

申请日：2007-12-05

申请人： Tien-Chun Yang ,  Yonggang Wu ,  Nian Yang

发明人： Tien-Chun Yang ,  Yonggang Wu ,  Nian Yang

IPC分类号： G11C7/00

CPC分类号： G11C16/30 ,  G11C7/12 ,  G11C16/24

摘要： Commonly, read times of a memory line are slowed due to voltage overshoot and/or voltage undershoot. To eliminate these problems, a control component can manage voltage while a leakage component manages timing of voltage. This allows for a line pre-charge that produces increase read times. The control component can implement as a variable resistor that modifies value to compensate for temperature. The leakage component can include a capacitor configuration that allows voltage to pass.

摘要翻译： 通常，存储线的读取时间由于电压过冲和/或电压下冲而变慢。 为了消除这些问题，控制部件可以管理电压，同时泄漏部件管理电压的时序。 这允许产生增加读取时间的线路预充电。 控制组件可以实现一个可变电阻器来修改值来补偿温度。 泄漏部件可以包括允许电压通过的电容器配置。

公开(公告)号：US20080266926A1

公开(公告)日：2008-10-30

申请号：US11741996

申请日：2007-04-30

申请人： Nian Yang ,  Yonggang Wu ,  Tien-Chun Yang

发明人： Nian Yang ,  Yonggang Wu ,  Tien-Chun Yang

IPC分类号： G11C5/06

CPC分类号： G11C8/12 ,  G11C7/12 ,  G11C7/18 ,  G11C16/24 ,  G11C2207/002

摘要： Manners for transferring information within a flash memory device across a memory array are described. A controller retrieves information from a storage unit and then a decoder decodes the information. The information is set across a series of bitlines through a pass gate to a second controller. The bitlines are both associated with the storage unit as well as bitlines associated with other storage units. A series of transistors is associated with each bitline. Different transistors are active based on if the bitlines are associated with the currently used storage unit.

摘要翻译： 描述了通过存储器阵列在闪速存储器件内传送信息的方式。 控制器从存储单元检索信息，然后解码器解码该信息。 信息通过一个通过门到一个第二个控制器的一系列位线设置。 位线都与存储单元相关联，以及与其他存储单元相关联的位线。 一系列晶体管与每个位线相关联。 基于如果位线与当前使用的存储单元相关联，不同的晶体管是有效的。