公开(公告)号：US20120182780A1

公开(公告)日：2012-07-19

申请号：US13430548

申请日：2012-03-26

Applicant: Steven Cheng

Inventor： Steven Cheng

IPC: G11C5/06

CPC classification number: G06F13/1668 ,  G11C7/1051 ,  G11C7/1063 ,  Y02D10/14

Abstract: A memory system includes a status circuit having a common status node electrically connected to a respective status pad of each of a plurality of memory chips. The memory system also includes a plurality of resistors disposed within the status circuit to define a voltage divider network for generating different voltage levels at the common status node. Each of the different voltage levels indicates a particular operational state combination of the plurality of memory chips. Also, each of the plurality of memory chips is either in a first operational state or a second operational state. Additionally, the different voltage levels are distributed within a voltage range extending from a power supply voltage level to a reference ground voltage level.

Abstract translation: 存储器系统包括具有电连接到多个存储器芯片中的每一个的相应状态焊盘的公共状态节点的状态电路。 存储器系统还包括设置在状态电路内的多个电阻器，以限定用于在公共状态节点处产生不同电压电平的分压器网络。 每个不同的电压电平指示多个存储器芯片的特定操作状态组合。 此外，多个存储器芯片中的每一个处于第一操作状态或第二操作状态。 此外，不同的电压电平分布在从电源电压电平延伸到参考接地电压电平的电压范围内。

公开(公告)号：US08144496B2

公开(公告)日：2012-03-27

申请号：US12495717

申请日：2009-06-30

Applicant: Steven Cheng

Inventor： Steven Cheng

IPC: G11C16/04

CPC classification number: G06F13/1668 ,  G11C7/1051 ,  G11C7/1063 ,  Y02D10/14

Abstract: A memory system includes a status circuit having a common status node electrically connected to a respective status pad of each of a plurality of memory chips. The memory system also includes a plurality of resistors disposed within the status circuit to define a voltage divider network for generating different voltage levels at the common status node. Each of the different voltage levels indicates a particular operational state combination of the plurality of memory chips. Also, each of the plurality of memory chips is either in a first operational state or a second operational state. Additionally, the different voltage levels are distributed within a voltage range extending from a power supply voltage level to a reference ground voltage level.

Abstract translation: 存储器系统包括具有电连接到多个存储器芯片中的每一个的相应状态焊盘的公共状态节点的状态电路。 存储器系统还包括设置在状态电路内的多个电阻器，以限定用于在公共状态节点处产生不同电压电平的分压器网络。 每个不同的电压电平指示多个存储器芯片的特定操作状态组合。 此外，多个存储器芯片中的每一个处于第一操作状态或第二操作状态。 此外，不同的电压电平分布在从电源电压电平延伸到参考接地电压电平的电压范围内。

公开(公告)号：US20060030270A1

公开(公告)日：2006-02-09

申请号：US10893751

申请日：2004-07-16

Applicant: Steven Cheng

Inventor： Steven Cheng

IPC: H04B17/00

CPC classification number: H04W52/0245 ,  H04B17/0085 ,  H04B17/23 ,  H04B17/26 ,  H04B17/27 ,  H04B17/309 ,  H04B17/318 ,  Y02D70/164

Abstract: The present invention provides a mobile station apparatus. The mobile station apparatus comprises an RF transmitting/receiving module, a display module, a memory comprising an RSSI database, and a control program. When the mobile station apparatus moves along a path comprising plural candidates of communication locations, the control program records a plurality of RSSIs, which are received by the RF transmitting/receiving module from the candidates along the communication locations, and at least one path parameter in the RSSI database, and then according to a predetermined display algorithm, the control program controls the display module to display at least one recorded RSSI and the corresponding path parameter as a reference, based on which the mobile station apparatus selects a communication location candidate for providing the mobile communication service.

Abstract translation: 本发明提供一种移动站装置。 移动站装置包括RF发送/接收模块，显示模块，包括RSSI数据库的存储器和控制程序。 当移动站装置沿着包含多个候选通信位置的路径移动时，控制程序从沿着通信位置的候选者记录由RF发送/接收模块接收的多个RSSI，以及至少一个路径参数 RSSI数据库，然后根据预定的显示算法，控制程序控制显示模块显示至少一个记录的RSSI和相应的路径参数作为参考，基于该参考，移动站装置选择通信位置候选者以提供 移动通信业务。

公开(公告)号：US09459955B2

公开(公告)日：2016-10-04

申请号：US13479442

申请日：2012-05-24

Applicant: Daniel Edward Tuers ,  Steven Cheng

Inventor： Daniel Edward Tuers ,  Steven Cheng

IPC: H04K1/04 ,  G06F11/10

CPC classification number: G06F11/1012 ,  G11B2220/60

Abstract: A data storage device includes a memory and a controller. The controller is configured to scramble data using a scramble key to produce scrambled data and to encode the scramble key to produce an encoded scramble key. The controller is further configured to store the encoded scramble key and the scrambled data to the memory.

Abstract translation: 数据存储装置包括存储器和控制器。 控制器被配置为使用加扰密钥对数据进行加密以产生加扰数据，并对加扰密钥进行编码以产生编码的加扰密钥。 控制器还被配置为将编码的加扰密钥和加密数据存储到存储器。

公开(公告)号：US08738997B2

公开(公告)日：2014-05-27

申请号：US12357896

申请日：2009-01-22

Applicant: Steven Cheng

Inventor： Steven Cheng

IPC: H03M13/00

CPC classification number: H04L1/1829 ,  H04L69/12 ,  H04L69/161 ,  H04L69/32

Abstract: Certain embodiments of the present disclosure control whether or not certain protocol stack operation are performed in a hardware (HW) protocol stack accelerator based on ARQ/HARQ re-transmission rate. Latency penalties associated with using the HW accelerator are typically higher than the data movement overhead when this data does not need to be processed by the HW accelerator, such as when a re-transmission error occurs. According to certain embodiments, the HW accelerator is activated if the ARQ/HARQ re-transmission rate is below a threshold value. Otherwise, if the ARQ/HARQ re-transmission rate is above a threshold, at least a portion of the HW accelerator may be de-activated, which may reduce overhead associated with moving data between the protocol stack and the HW accelerator.

Abstract translation: 本公开的某些实施例基于ARQ / HARQ重传速率来控制是否在硬件（HW）协议栈加速器中执行某些协议栈操作。 当HW数据不需要由HW加速器处理时，例如当发生重传错误时，与使用HW加速器相关联的延迟处罚通常高于数据移动开销。 根据某些实施例，如果ARQ / HARQ重传率低于阈值，则HW加速器被激活。 否则，如果ARQ / HARQ重传速率高于阈值，那么硬件加速器的至少一部分可以被去激活，这可以减少与在协议栈和HW加速器之间的移动数据相关联的开销。

公开(公告)号：US20100265934A1

公开(公告)日：2010-10-21

申请号：US12425539

申请日：2009-04-17

Applicant: Chun Woo Lee ,  Remi Gurski ,  Steven Cheng ,  Patrick Lim

Inventor： Chun Woo Lee ,  Remi Gurski ,  Steven Cheng ,  Patrick Lim

IPC: H04J3/06

CPC classification number: H04W48/12

Abstract: Certain embodiments of the present disclosure provide techniques for bypassing the DCD/UCD message reception step in the network entry procedure in WiMAX systems by using DCD/UCD messages that are stored in a nonvolatile memory inside a mobile station.

Abstract translation: 本公开的某些实施例提供了通过使用存储在移动站内的非易失性存储器中的DCD / UCD消息来绕过WiMAX系统中的网络进入过程中的DCD / UCD消息接收步骤的技术。

公开(公告)号：US09268386B2

公开(公告)日：2016-02-23

申请号：US12351802

申请日：2009-01-09

Applicant: Steven Cheng ,  Kuo-Chun Lee ,  Guangming Carl Shi

Inventor： Steven Cheng ,  Kuo-Chun Lee ,  Guangming Carl Shi

IPC: G06F1/32 ,  H04W52/02

CPC classification number: G06F1/3203 ,  G06F1/324 ,  G06F1/3287 ,  H04W52/0261 ,  Y02D10/126 ,  Y02D10/171 ,  Y02D70/1222 ,  Y02D70/1242 ,  Y02D70/146

Abstract: Certain embodiments of the present disclosure relate to methods for improving a service flow of a mobile device based upon a different level of its available battery power. If the battery power availability is below a predefined threshold, then one or more power-saving techniques can be triggered that increase an air time of the mobile device and provide savings of power consumption at different rates using a different level of clock rate.

Abstract translation: 本公开的某些实施例涉及基于其可用电池功率的不同水平来改进移动设备的服务流程的方法。 如果电池电力可用性低于预定阈值，则可以触发一个或多个省电技术，增加移动设备的空中时间，并且使用不同的时钟频率水平以不同的速率节省功耗。

公开(公告)号：US20100328983A1

公开(公告)日：2010-12-30

申请号：US12495717

申请日：2009-06-30

Applicant: Steven Cheng

Inventor： Steven Cheng

IPC: G11C5/02 ,  G11C5/14 ,  G11C7/00

CPC classification number: G06F13/1668 ,  G11C7/1051 ,  G11C7/1063 ,  Y02D10/14

Abstract: A memory system includes a status circuit having a common status node electrically connected to a respective status pad of each of a plurality of memory chips. The memory system also includes a plurality of resistors disposed within the status circuit to define a voltage divider network for generating different voltage levels at the common status node. Each of the different voltage levels indicates a particular operational state combination of the plurality of memory chips. Also, each of the plurality of memory chips is either in a first operational state or a second operational state. Additionally, the different voltage levels are distributed within a voltage range extending from a power supply voltage level to a reference ground voltage level.

Abstract translation: 存储器系统包括具有电连接到多个存储器芯片中的每一个的相应状态焊盘的公共状态节点的状态电路。 存储器系统还包括设置在状态电路内的多个电阻器，以限定用于在公共状态节点处产生不同电压电平的分压器网络。 每个不同的电压电平指示多个存储器芯片的特定操作状态组合。 此外，多个存储器芯片中的每一个处于第一操作状态或第二操作状态。 此外，不同的电压电平分布在从电源电压电平延伸到参考接地电压电平的电压范围内。

公开(公告)号：US20050215268A1

公开(公告)日：2005-09-29

申请号：US10811185

申请日：2004-03-26

Applicant: Steven Cheng

Inventor： Steven Cheng

IPC: G01R29/08 ,  H04B1/00 ,  H04B1/38 ,  H04B17/00 ,  H04M15/00 ,  H04W24/00

CPC classification number: H04B1/3838 ,  H04B17/318 ,  H04W24/00

Abstract: A radiation detection method and apparatus thereof for estimating radiation power received by the mobile station. The locations of nearby base stations and the mobile station are obtained from the broadcast system messages and the location service provided by the service provider, and based on the location information, the radiation power is estimated according to the distances between the base stations and the mobile station. In addition, the radiation estimation process also utilizes the radiation power of monitored base stations constantly measured by the mobile station for cell selection to determine the effects of interference. Based on a preset safety value and the estimated radiation power, the radiation detection device of the present invention automatically issues an alert when entering a high radiation environment.

Abstract translation: 一种辐射检测方法及其装置，用于估计由移动台接收的辐射功率。 从广播系统消息和由服务提供商提供的定位服务获得附近基站和移动站的位置，并且基于位置信息，根据基站和移动台之间的距离来估计辐射功率 站。 此外，辐射估计过程还利用由移动台持续测量的被监控基站的辐射功率进行小区选择，以确定干扰的影响。 基于预设的安全值和估计的辐射功率，本发明的放射线检测装置在进入高辐射环境时自动发出警报。

公开(公告)号：US08788889B2

公开(公告)日：2014-07-22

申请号：US13304272

申请日：2011-11-23

Applicant: Seungjune Jeon ,  Steven Cheng

Inventor： Seungjune Jeon ,  Steven Cheng

IPC: G06F11/00 ,  G06F11/10 ,  G06F13/14 ,  H04L1/00

CPC classification number: G06F11/1048 ,  G06F13/14 ,  H04L1/0061

Abstract: An aliasing module is defined and connected to receive a first bit stream to be transmitted over a data bus from a memory to an external controller of the memory. The aliasing module is defined and connected to alias the first bit stream as a second bit stream and transmit the second bit stream over the data bus in lieu of the first bit stream. A de-aliasing module is defined and connected to receive the second bit stream from the data bus at the external controller. The de-aliasing module is defined and connected to de-alias the received second bit stream back to the first bit stream and provide the first bit stream to the external controller for processing.

Abstract translation: 定义并连接混叠模块以接收要通过数据总线从存储器向存储器的外部控制器发送的第一位流。 将混叠模块定义并连接到第一比特流的别名作为第二比特流，并且通过数据总线传送第二比特流代替第一比特流。 解除混叠模块被定义和连接以在外部控制器处从数据总线接收第二位流。 去混叠模块被定义和连接以将接收到的第二比特流解复用回第一比特流，并将第一比特流提供给外部控制器进行处理。