公开(公告)号：US20220189946A1

公开(公告)日：2022-06-16

申请号：US17687380

申请日：2022-03-04

Applicant: Texas Instruments Incorporated

Inventor： Akram A. Salman ,  Farzan Farbiz ,  Amitava Chatterjee ,  Xiaoju Wu

IPC: H01L27/02 ,  H01L29/74 ,  H01L29/10

Abstract: A semiconductor controlled rectifier (FIG. 4A) for an integrated circuit is disclosed. The semiconductor controlled rectifier comprises a first lightly doped region (100) having a first conductivity type (N) and a first heavily doped region (108) having a second conductivity type (P) formed within the first lightly doped region. A second lightly doped region (104) having the second conductivity type is formed proximate the first lightly doped region. A second heavily doped region (114) having the first conductivity type is formed within the second lightly doped region. A buried layer (101) having the first conductivity type is formed below the second lightly doped region and electrically connected to the first lightly doped region. A third lightly doped region (102) having the second conductivity type is formed between the second lightly doped region and the third heavily doped region. A fourth lightly doped region (400) having the second conductivity type is formed between the second lightly doped region and the third heavily doped region and electrically connected to the second and third lightly doped regions.

公开(公告)号：US11302688B2

公开(公告)日：2022-04-12

申请号：US16054037

申请日：2018-08-03

Applicant: Texas Instruments Incorporated

Inventor： Akram A. Salman ,  Farzan Farbiz ,  Amitava Chatterjee ,  Xiaoju Wu

IPC: H01L27/02 ,  H01L29/73 ,  H01L29/74 ,  H01L29/10

Abstract: A semiconductor controlled rectifier (FIG. 4A) for an integrated circuit is disclosed. The semiconductor controlled rectifier comprises a first lightly doped region (100) having a first conductivity type (N) and a first heavily doped region (108) having a second conductivity type (P) formed within the first lightly doped region. A second lightly doped region (104) having the second conductivity type is formed proximate the first lightly doped region. A second heavily doped region (114) having the first conductivity type is formed within the second lightly doped region. A buried layer (101) having the first conductivity type is formed below the second lightly doped region and electrically connected to the first lightly doped region. A third lightly doped region (102) having the second conductivity type is formed between the second lightly doped region and the third heavily doped region. A fourth lightly doped region (400) having the second conductivity type is formed between the second lightly doped region and the third heavily doped region and electrically connected to the second and third lightly doped regions.

公开(公告)号：US11049852B2

公开(公告)日：2021-06-29

申请号：US16053985

申请日：2018-08-03

Applicant: Texas Instruments Incorporated

Inventor： Akram A. Salman ,  Farzan Farbiz ,  Amitava Chatterjee ,  Xiaoju Wu

IPC: H01L27/02 ,  H01L29/10 ,  H01L29/74

Abstract: A semiconductor controlled rectifier (FIG. 4A) for an integrated circuit is disclosed. The semiconductor controlled rectifier comprises a first lightly doped region (100) having a first conductivity type (N) and a first heavily doped region (108) having a second conductivity type (P) formed within the first lightly doped region. A second lightly doped region (104) having the second conductivity type is formed proximate the first lightly doped region. A second heavily doped region (114) having the first conductivity type is formed within the second lightly doped region. A buried layer (101) having the first conductivity type is formed below the second lightly doped region and electrically connected to the first lightly doped region. A third lightly doped region (102) having the second conductivity type is formed between the second lightly doped region and the third heavily doped region. A fourth lightly doped region (400) having the second conductivity type is formed between the second lightly doped region and the third heavily doped region and electrically connected to the second and third lightly doped regions.

公开(公告)号：US20170345929A1

公开(公告)日：2017-11-30

申请号：US15679908

申请日：2017-08-17

Applicant: Texas Instruments Incorporated

Inventor： Amitava Chatterjee

IPC: H01L29/78 ,  H01L29/49 ,  H01L29/423 ,  H01L29/08 ,  H01L29/06 ,  H01L21/762 ,  H01L21/3105 ,  H01L29/66 ,  H01L21/28 ,  H01L21/8238

CPC classification number: H01L29/7833 ,  H01L21/28123 ,  H01L21/31051 ,  H01L21/76224 ,  H01L21/823828 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/42356 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/66568

Abstract: Metal-oxide-semiconductor (MOS) transistors with reduced subthreshold conduction, and methods of fabricating the same. Transistor gate structures are fabricated in these transistors of a shape and dimension as to overlap onto the active region from the interface between isolation dielectric structures and the transistor active areas. Minimum channel length conduction is therefore not available at the isolation-to-active interface, but rather the channel length along that interface is substantially lengthened, reducing off-state conduction.

公开(公告)号：US09768296B2

公开(公告)日：2017-09-19

申请号：US14846398

申请日：2015-09-04

Applicant: Texas Instruments Incorporated

Inventor： Amitava Chatterjee

IPC: H01L29/78 ,  H01L31/08 ,  H01L21/28 ,  H01L29/423 ,  H01L21/3105 ,  H01L21/762 ,  H01L29/06 ,  H01L29/08 ,  H01L29/49 ,  H01L29/66 ,  H01L21/8238

CPC classification number: H01L29/7833 ,  H01L21/28123 ,  H01L21/31051 ,  H01L21/76224 ,  H01L21/823828 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/42356 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/66568

Abstract: Metal-oxide-semiconductor (MOS) transistors with reduced subthreshold conduction, and methods of fabricating the same. Transistor gate structures are fabricated in these transistors of a shape and dimension as to overlap onto the active region from the interface between isolation dielectric structures and the transistor active areas. Minimum channel length conduction is therefore not available at the isolation-to-active interface, but rather the channel length along that interface is substantially lengthened, reducing off-state conduction.

公开(公告)号：US09431302B2

公开(公告)日：2016-08-30

申请号：US14712133

申请日：2015-05-14

Applicant: Texas Instruments Incorporated

Inventor： Pinghai Hao ,  Sameer Pendharkar ,  Amitava Chatterjee

IPC: H01L27/092 ,  H01L29/423 ,  H01L29/10 ,  H01L21/8238 ,  H01L21/265

CPC classification number: H01L21/823807 ,  H01L21/26513 ,  H01L21/823814 ,  H01L21/823857 ,  H01L21/823864 ,  H01L27/092 ,  H01L27/0928 ,  H01L29/105 ,  H01L29/42364

Abstract: Impurity atoms of a first type are implanted through a gate and a thin gate dielectric into a channel region that has substantially only the first type of impurity atoms at a middle point of the channel region to increase the average dopant concentration of the first type of impurity atoms in the channel region to adjust the threshold voltage of a transistor.

公开(公告)号：US09397164B2

公开(公告)日：2016-07-19

申请号：US14944481

申请日：2015-11-18

Applicant: Texas Instruments Incorporated

Inventor： Brian E. Hornung ,  Xiang-Zheng Bo ,  Amitava Chatterjee ,  Alwin J. Tsao

IPC: H01L29/10 ,  H01L27/06

CPC classification number: H01L29/1004 ,  H01L21/265 ,  H01L21/2652 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/0821 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/66272 ,  H01L29/6659 ,  H01L29/732 ,  H01L29/7833

Abstract: An integrated circuit and method having a deep collector vertical bipolar transistor with a first base tuning diffusion. A MOS transistor has a second base tuning diffusion. The first base tuning diffusion and the second base tuning diffusion are formed using the same implant.

Abstract translation: 一种集成电路和方法，其具有具有第一基极调谐扩散的深集电极垂直双极晶体管。 MOS晶体管具有第二基极调谐扩散。 第一基调谐扩散和第二基调谐扩散使用相同的植入物形成。

公开(公告)号：US20160079392A1

公开(公告)日：2016-03-17

申请号：US14949241

申请日：2015-11-23

Applicant: Texas Instruments Incorporated

Inventor： Philipp Steinmann ,  Amitava Chatterjee ,  Sameer Pendharkar

IPC: H01L29/66 ,  G06F17/50

CPC classification number: H01L29/66681 ,  G06F17/5081 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/161 ,  H01L29/167 ,  H01L29/66659 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/7816 ,  H01L29/7835 ,  H01L29/861

Abstract: An integrated circuit containing a diode with a drift region containing a first dopant type plus scattering centers. An integrated circuit containing a DEMOS transistor with a drift region containing a first dopant type plus scattering centers. A method for designing an integrated circuit containing a DEMOS transistor with a counter doped drift region.

Abstract translation: 一种集成电路，其包含具有包含第一掺杂剂型和散射中心的漂移区的二极管。 一种包含DEMOS晶体管的集成电路，其具有包含第一掺杂剂型和散射中心的漂移区。 一种用于设计包含具有反掺杂漂移区的DEMOS晶体管的集成电路的方法。

公开(公告)号：US09231054B2

公开(公告)日：2016-01-05

申请号：US14073530

申请日：2013-11-06

Applicant: Texas Instruments Incorporated

Inventor： Philipp Steinmann ,  Amitava Chatterjee ,  Sameer Pendharkar

IPC: H01L21/00 ,  H01L29/08 ,  H01L29/161 ,  H01L29/167 ,  H01L29/66 ,  H01L29/78 ,  H01L29/861 ,  H01L29/10

CPC classification number: H01L29/66681 ,  G06F17/5081 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/161 ,  H01L29/167 ,  H01L29/66659 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/7816 ,  H01L29/7835 ,  H01L29/861

Abstract: An integrated circuit containing a diode with a drift region containing a first dopant type plus scattering centers. An integrated circuit containing a DEMOS transistor with a drift region containing a first dopant type plus scattering centers. A method for designing an integrated circuit containing a DEMOS transistor with a counter doped drift region.

公开(公告)号：US09099523B2

公开(公告)日：2015-08-04

申请号：US13668022

申请日：2012-11-02

Applicant: Texas Instruments Incorporated

Inventor： Akram A. Salman ,  Farzan Farbiz ,  Amitava Chatterjee ,  Xiaoju Wu

IPC: H01L29/74 ,  H01L27/02

CPC classification number: H01L27/0262 ,  H01L29/1012 ,  H01L29/7424 ,  H01L29/7436

Abstract: A semiconductor controlled rectifier comprises a first lightly doped region (100) having a first conductivity type (N) and a first heavily doped region (108) having a second conductivity type (P) formed within the first lightly doped region. A second lightly doped region (104) having the second conductivity type is formed proximate the first lightly doped region. A second heavily doped region (114) having the first conductivity type is formed within the second lightly doped region. A buried layer (101) having the first conductivity type is formed below the second lightly doped region and electrically connected to the first lightly doped region. A third lightly doped region (102) having the second conductivity type is formed between the second lightly doped region and the buried layer. A fourth lightly doped region (400) having the second conductivity type is formed between the second lightly doped region and the buried layer.

Abstract translation: 半导体可控整流器包括具有第一导电类型（N）的第一轻掺杂区域（100）和在第一轻掺杂区域内形成的具有第二导电类型（P）的第一重掺杂区域（108）。 具有第二导电类型的第二轻掺杂区域（104）形成在第一轻掺杂区域附近。 在第二轻掺杂区域内形成具有第一导电类型的第二重掺杂区域（114）。 具有第一导电类型的掩埋层（101）形成在第二轻掺杂区域的下方并且电连接到第一轻掺杂区域。 在第二轻掺杂区域和掩埋层之间形成具有第二导电类型的第三轻掺杂区域（102）。 在第二轻掺杂区域和掩埋层之间形成具有第二导电类型的第四轻掺杂区域（400）。