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公开(公告)号：US20160182017A1
公开(公告)日：2016-06-23
申请号：US14580388
申请日：2014-12-23
Applicant: Texas Instruments Incorporated
Inventor： Rahul Sharma , Nagesh Surendranath , Sandeep Kesrimal Oswal
IPC: H03K3/012 , H02M1/12 , H03K17/687 , H02M1/08
CPC classification number: H03K3/012 , G05F1/561 , G06G7/184 , G06G7/186 , H02M1/08 , H02M1/12 , H02M2001/123 , H03F3/082 , H03H11/1291 , H03H19/004 , H03K4/023 , H03K17/687
Abstract: Charge to voltage conversion integrator circuitry for data acquisition front-end and other applications to provide a single-ended up a voltage using an input bias capacitance and a switching circuit to selectively place an input transistor in a negative feedback configuration in a first mode to charge the input bias capacitance to a calibration voltage for compensating integrator amplifier bias circuitry, with the switching circuit connecting an input node and the input bias capacitance in a second mode to integrate the input current signal across a feedback capacitance to provide a single-ended output voltage with the input bias capacitance maintaining a zero voltage at the input node.
Abstract translation: 充电到电压转换积分电路，用于数据采集前端和其他应用，以提供使用输入偏置电容的单端上电压和开关电路，以在第一模式中将输入晶体管选择性地置于负反馈配置中以进行充电 将校准电压的输入偏置电容用于补偿积分放大器偏置电路，其中开关电路将输入节点和输入偏置电容连接在第二模式中，以将输入电流信号整合在反馈电容上以提供单端输出电压 输入偏置电容在输入节点保持零电压。
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公开(公告)号：US09287862B2
公开(公告)日：2016-03-15
申请号：US14533787
申请日：2014-11-05
Applicant: Texas Instruments Incorporated
Inventor： Rakul Viswanath , Rahul Sharma
CPC classification number: H03K17/063 , G01N23/046 , H03K17/16 , H03K2217/0036 , H03M3/496 , H05G1/70
Abstract: A bootstrap circuit for a sampling transistor. A circuit includes a MOS transistor having a source terminal coupled to an input for receiving an input voltage; an output at a drain terminal of the MOS transistor coupled to one plate of a sampling capacitor; a first switch coupling the input voltage to a gate terminal of the MOS transistor responsive to an initial phase control signal; a bootstrap capacitor having a top plate coupled to the gate terminal of the MOS transistor and coupled to the first switch; a second switch coupling a bottom plate of the bootstrap capacitor to a first low voltage supply responsive to the initial phase control signal; a third switch coupling the bottom plate of the bootstrap capacitor to a positive voltage supply greater than the first low voltage supply responsive to a first phase periodic control signal. Additional circuits and systems are disclosed.
Abstract translation: 用于采样晶体管的自举电路。 电路包括MOS晶体管，其源极端子耦合到用于接收输入电压的输入端; 耦合到采样电容器的一个板的MOS晶体管的漏极端子处的输出; 响应于初始相位控制信号将输入电压耦合到MOS晶体管的栅极端子的第一开关; 自举电容器，其具有耦合到所述MOS晶体管的所述栅极端子并耦合到所述第一开关的顶板; 第二开关，其将所述自举电容器的底板耦合到响应于所述初始相位控制信号的第一低电压电源; 第三开关，其将所述自举电容器的底板耦合到响应于第一相位周期控制信号的大于所述第一低电压电源的正电压电源。 公开了附加电路和系统。
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公开(公告)号：US20150188533A1
公开(公告)日：2015-07-02
申请号：US14533787
申请日：2014-11-05
Applicant: Texas Instruments Incorporated
Inventor： Rakul Viswanath , Rahul Sharma
CPC classification number: H03K17/063 , G01N23/046 , H03K17/16 , H03K2217/0036 , H03M3/496 , H05G1/70
Abstract: A bootstrap circuit for a sampling transistor. A circuit includes a MOS transistor having a source terminal coupled to an input for receiving an input voltage; an output at a drain terminal of the MOS transistor coupled to one plate of a sampling capacitor; a first switch coupling the input voltage to a gate terminal of the MOS transistor responsive to an initial phase control signal; a bootstrap capacitor having a top plate coupled to the gate terminal of the MOS transistor and coupled to the first switch; a second switch coupling a bottom plate of the bootstrap capacitor to a first low voltage supply responsive to the initial phase control signal; a third switch coupling the bottom plate of the bootstrap capacitor to a positive voltage supply greater than the first low voltage supply responsive to a first phase periodic control signal. Additional circuits and systems are disclosed.
Abstract translation: 用于采样晶体管的自举电路。 电路包括MOS晶体管，其源极端子耦合到用于接收输入电压的输入端; 耦合到采样电容器的一个板的MOS晶体管的漏极端子处的输出; 响应于初始相位控制信号将输入电压耦合到MOS晶体管的栅极端子的第一开关; 自举电容器，其具有耦合到所述MOS晶体管的所述栅极端子并耦合到所述第一开关的顶板; 第二开关，其将所述自举电容器的底板耦合到响应于所述初始相位控制信号的第一低电压电源; 第三开关，其将所述自举电容器的底板耦合到响应于第一相位周期控制信号的大于所述第一低电压电源的正电压电源。 公开了附加电路和系统。
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