公开(公告)号：US11437101B2

公开(公告)日：2022-09-06

申请号：US17226052

申请日：2021-04-08

Applicant: Winbond Electronics Corp.

Inventor： Lih-Wei Lin ,  Lung-Chi Cheng ,  Ju-Chieh Cheng ,  Ying-Shan Kuo

IPC: G11C11/00 ,  G11C13/00

Abstract: A resistive memory storage apparatus including a memory cell, a selecting transistor and a memory controller is provided. The memory cell outputs a writing current during a writing pulse width period. The selecting transistor is coupled to the memory cell. The memory controller is coupled to the selecting transistor and the memory cell. The memory controller is configured to apply a control voltage that gradually changes to a predetermined voltage level to a control end of the selecting transistor during a resistance transition phase of the writing pulse width period and set the control voltage to the predetermined voltage level during a filament stabilization phase after the resistance transition phase, so as to limit the writing current to a predetermined current value. In addition, an operating method for a resistive memory storage apparatus is also provided.

公开(公告)号：US11175988B2

公开(公告)日：2021-11-16

申请号：US16831828

申请日：2020-03-27

Applicant: Winbond Electronics Corp.

Inventor： Lih-Wei Lin ,  Tsung-Huan Tsai ,  Chi-Shun Lin

IPC: G06F11/10 ,  H03M13/45 ,  H04L1/00

Abstract: A memory storage device including a memory storage array and a memory controller is provided. The memory storage array is configured to store data. The memory controller is coupled to the memory storage array. The memory controller is configured to write to-be-written data to the memory storage array. The to-be-written data includes a plurality of data bits and a flip bit. The memory controller performs a verification operation on the to-be-written data to determine whether the data bits includes error bits and records information of the error bits. The memory controller, determines, according to a quantity of the error bits, whether to invert parities of the data bits and the flip bit, and records the parity of the flip bit. In addition, a data access method is also provided.

公开(公告)号：US09691980B1

公开(公告)日：2017-06-27

申请号：US15332393

申请日：2016-10-24

Applicant: Winbond Electronics Corp.

Inventor： Chia-Hung Lin ,  Lih-Wei Lin ,  I-Hsien Tseng ,  Tsung-Huan Tsai

IPC: H01L45/00 ,  G11C13/00 ,  G11C29/04 ,  H01L21/66

CPC classification number: H01L45/1641 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0069 ,  G11C13/0097 ,  G11C29/04 ,  G11C29/06 ,  G11C29/50008 ,  G11C29/50012 ,  G11C29/50016 ,  G11C2013/0083 ,  G11C2029/0403 ,  G11C2029/5002 ,  G11C2029/5006 ,  H01L22/20 ,  H01L45/146 ,  H01L45/1608

Abstract: A method for forming a memory device is provided. The method includes forming a plurality of memory cells. The method also includes performing a first baking on the memory cells. The method further includes setting a specified current, and after performing the first baking, performing a test process on the memory cells. The test process includes reading the current of the memory cells. When the read current of the memory cells is larger than or equal to the specified current, the test process of the memory cell is done. When the read current of the memory cells is smaller than the specified current, a re-forming process is performed on the memory cells to form a plurality of re-formed memory cells, and then the test process is performed on the re-formed memory cells.

公开(公告)号：US09543010B2

公开(公告)日：2017-01-10

申请号：US15019187

申请日：2016-02-09

Applicant: WINBOND ELECTRONICS CORP.

Inventor： Lih-Wei Lin ,  Chia-Hung Lin ,  Tsung-Huan Tsai ,  Ju-Chieh Cheng ,  I-Hsien Tseng

IPC: G11C11/00 ,  G11C13/00 ,  G11C29/50

CPC classification number: G11C13/0069 ,  G11C13/0064 ,  G11C29/50008 ,  G11C2013/0066 ,  G11C2013/0083 ,  G11C2013/0092 ,  G11C2029/5006 ,  G11C2213/79 ,  G11C2213/82

Abstract: A measurement system including a testing machine and a resistive memory is provided. The resistive memory includes a first storage cell. The first storage cell includes a transistor and a variable resistor. During a specific period, the testing machine provides a write voltage to change the state of the variable resistor. During a maintaining period, the testing machine maintains the level of the write voltage and measures the current passing through the variable resistor. When the current passing through the variable resistor does not arrive at a pre-determined value, the testing machine increases the level of the write voltage. Furthermore, a resistive memory utilizing the testing machine is also provided.

Abstract translation: 提供了包括测试机和电阻式存储器的测量系统。 电阻性存储器包括第一存储单元。 第一存储单元包括晶体管和可变电阻器。 在特定的时间段内，测试机提供写入电压来改变可变电阻的状态。 在维护期间，测试机器保持写入电压的电平并测量通过可变电阻器的电流。 当通过可变电阻器的电流未达到预定值时，测试机器增加写入电压的电平。 此外，还提供了利用测试机器的电阻性存储器。