公开(公告)号：US5694315A

公开(公告)日：1997-12-02

申请号：US469647

申请日：1995-06-06

Applicant: Wei-Jen Huang ,  Ming-Mu Hsieh ,  Hsi-Chin Chen ,  Hsin-Chung Chang ,  Alpha Tsay

Inventor： Wei-Jen Huang ,  Ming-Mu Hsieh ,  Hsi-Chin Chen ,  Hsin-Chung Chang ,  Alpha Tsay

IPC: G06K9/32 ,  G06T1/00 ,  G06K9/20

CPC classification number: G06K9/3216 ,  G06T1/0007

Abstract: A novel method for scanning multiple images in a single scanning process is disclosed. The process utilizes at least a frame holder, which contains a front frame section and a back frame section that are glued together at their top edges and are separable at least at their bottom to allow a sheet of scanning material to be placed therebetween. Each of the front and back frame sections contains a cluster of matching orientation holes on their right and left sides with a predetermined pattern to allow a computer program to achieve scan area recognition and orientation. During the scanning process, the at least one frame holder containing the image is scanned, wherein the sides of the frame holder are detected as black signals and the orientation holes are detected as white signals. Then a computer program is used to perform a previewing recognition process by detecting and carving out a scanning area corresponding to each frame holder based on the black signals and the white signals of the frame holder. The frame holder can contain a plurality of scanning windows, and more than one frame holder can be utilized in the same scanning process.

Abstract translation: 公开了一种用于在单个扫描过程中扫描多个图像的新颖方法。 该工艺利用至少一个框架架，其包含前框架部分和后框架部分，该前框架部分和后框架部分在其顶部边缘处胶合在一起，并且至少在其底部可分离以允许将一张扫描材料放置在其间。 前框架部分和后框架部分中的每一个在其左侧和右侧具有一组匹配的定位孔，具有预定的图案，以允许计算机程序实现扫描区域识别和取向。 在扫描过程中，扫描包含图像的至少一个框架保持架，其中帧保持器的侧面被检测为黑色信号，并且定向孔被检测为白色信号。 然后，使用计算机程序，通过根据帧保持器的黑色信号和白色信号检测和雕刻出与每个帧保持器相对应的扫描区域来执行预览识别处理。 框架保持器可以包含多个扫描窗口，并且可以在相同的扫描过程中使用多于一个的帧保持器。

公开(公告)号：US09929829B1

公开(公告)日：2018-03-27

申请号：US13397062

申请日：2012-02-15

Applicant: Wei-Jen Huang ,  Chih-Tsung Huang

Inventor： Wei-Jen Huang ,  Chih-Tsung Huang

IPC: H04L1/00

CPC classification number: H04L1/00 ,  H04L47/10

Abstract: A method is provided in one example embodiment that includes measuring a delay between a transmitter and a receiver in a network environment, where the receiver is associated with a buffer. A minimum absorption buffer size for lossless transmission to a queue may be determined based on the delay and a transmission bandwidth, and buffer units for the queue can be allocated based on the minimum absorption buffer size. The transmitter may also be rate-limited if the minimum absorption buffer size exceeds available storage of the buffer. In other embodiments, buffer units can be reclaimed if the available buffer storage exceeds the minimum absorption buffer size.

公开(公告)号：US08854817B2

公开(公告)日：2014-10-07

申请号：US13570279

申请日：2012-08-09

Applicant: Shih-Yao Li ,  Jui-Wen Hung ,  Wei-Jen Huang

Inventor： Shih-Yao Li ,  Jui-Wen Hung ,  Wei-Jen Huang

IPC: H05K7/20 ,  F28D15/00

CPC classification number: H01L23/467 ,  H01L23/3672 ,  H01L23/4006 ,  H01L23/427 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An exemplary electronic device includes an electronic component, a heat dissipation device, a fixing member and a casing contained the electronic component, the heat dissipation device and the fixing member therein. The heat dissipation device thermally contacts the electronic component. The fixing member includes a main body and an engaging portion extending from the main body. The engaging portion fixes the heat dissipation device to the fixing member. Fasteners extend through the casing and engage the main body of the fixing member to secure the fixing member on the casing.

Abstract translation: 示例性的电子设备包括电子部件，散热装置，固定部件和容纳电子部件，散热装置和固定部件的壳体。 散热装置与电子部件热接触。 固定构件包括主体和从主体延伸的接合部。 接合部将散热装置固定在固定部件上。 紧固件延伸穿过壳体并接合固定构件的主体以将固定构件固定在壳体上。

公开(公告)号：US08657471B2

公开(公告)日：2014-02-25

申请号：US13169039

申请日：2011-06-27

Applicant: Wei-Jen Huang ,  Jui-Wen Hung ,  Ching-Bai Hwang

Inventor： Wei-Jen Huang ,  Jui-Wen Hung ,  Ching-Bai Hwang

IPC: F21V29/00

CPC classification number: F21V29/51 ,  F21K9/232 ,  F21V3/00 ,  F21V29/006 ,  F21V29/773 ,  F21Y2115/10

Abstract: An LED lamp includes a heat sink, a heat pipe and an LED. The heat sink includes a connecting core and fins mounted around the connecting core. Each of the fins includes a plate-shaped main body and a flange extending perpendicularly from a periphery side of the main body. The flanges of the fins cooperatively form an annular planar top surface of the heat sink. The heat pipe includes a condensing section, an evaporating section parallel to and higher than the condensing section and an adiabatic section connected between the condensing section and the evaporating section. The condensing section is fixed to and thermally connects with the top surface of the heat sink. The LED is directly mounted on the evaporating section with a light emitting surface thereof facing outwardly.

Abstract translation: LED灯包括散热器，热管和LED。 散热器包括连接芯和围绕连接芯安装的散热片。 每个翅片包括板状主体和从主体的周边垂直延伸的凸缘。 翅片的凸缘协同地形成散热器的环形平面顶表面。 热管包括冷凝部，与冷凝部平行且高于冷凝部的蒸发部，以及连接在冷凝部和蒸发部之间的绝热部。 冷凝部分与散热片的顶面固定并热连接。 LED直接安装在蒸发部分上，其发光表面面向外。

公开(公告)号：US07839167B2

公开(公告)日：2010-11-23

申请号：US12356317

申请日：2009-01-20

Applicant: Tony Ngai ,  Bruce Pedersen ,  Sergey Shumarayev ,  James Schleicher ,  Wei-Jen Huang ,  Michael Hutton ,  Victor Maruri ,  Rakesh Patel ,  Peter J. Kazarian ,  Andrew Leaver ,  David W. Mendel ,  Jim Park

Inventor： Tony Ngai ,  Bruce Pedersen ,  Sergey Shumarayev ,  James Schleicher ,  Wei-Jen Huang ,  Michael Hutton ,  Victor Maruri ,  Rakesh Patel ,  Peter J. Kazarian ,  Andrew Leaver ,  David W. Mendel ,  Jim Park

IPC: H01L25/00 ,  H03K19/177

CPC classification number: G06F7/506 ,  H03K19/1737 ,  H03K19/177 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/1774 ,  H03K19/17744 ,  H03K19/17792

Abstract: A programmable logic integrated circuit device has a plurality of regions of programmable logic disposed on the device in a plurality of intersecting rows and columns of such regions. Interconnection resources (e.g., interconnection conductors, signal buffers/drivers, programmable connectors, etc.) are provided on the device for making programmable interconnections to, from, and/or between the regions. At least some of these interconnection resources are provided in two forms that are architecturally similar (e.g., with similar and substantially parallel routing) but that have significantly different signal propagation speed characteristics. For example, a major or larger portion of such dual-form interconnection resources may have what may be termed normal signal speed, while a smaller minor portion may have significantly faster signal speed. Secondary (e.g., clock and clear) signal distribution may also be enhanced, and so may be input/output circuitry and cascade connections between adjacent or nearby logic modules on the device.

Abstract translation: 可编程逻辑集成电路器件具有多个可编程逻辑区域，该多个可编程逻辑区域设置在该区域的多个相交行和列中的该器件上。 在设备上提供互连资源（例如，互连导体，信号缓冲器/驱动器，可编程连接器等），用于对区域之间，从区域和/或区域之间进行可编程互连。 这些互连资源中的至少一些以架构上相似的两种形式提供（例如，具有相似和基本上并行的路由），但具有显着不同的信号传播速度特性。 例如，这种双形互连资源的主要或更大部分可以具有所谓的正常信号速度，而较小次要部分可具有明显更快的信号速度。 辅助（例如时钟和清除）信号分布也可以被增强，并且因此也可以是设备上的相邻或附近逻辑模块之间的输入/输出电路和级联连接。

公开(公告)号：US07710091B2

公开(公告)日：2010-05-04

申请号：US11819461

申请日：2007-06-27

Applicant: Wei-Jen Huang

Inventor： Wei-Jen Huang

IPC: G05F1/575

CPC classification number: G05F1/575

Abstract: The present invention discloses an LDO (Low DropOut) linear voltage regulator, which is based on an NMC (Nested Miller Compensation) architecture and can be capacitor-free, wherein an active resistor is added to the feedback path of the Miller compensation capacitor to increase the controllability of the damping factor, solve the problem of extensively using the output capacitor with a parasitic resistance, and solve the problem that a compromise must be made between the damping factor control and the system loop gain. Further, the present invention utilizes a capacitor-sharing technique to reduce the Miller capacitance required by the entire system and accelerate the stabilization of output voltage without influencing stability.

Abstract translation: 本发明公开了一种基于NMC（嵌套米勒补偿）架构的LDO（Low DropOut）线性稳压器，其可以是无电容的，其中有效电阻被添加到Miller补偿电容器的反馈路径中以增加 阻尼因子的可控性解决了使用具有寄生电阻的输出电容器的问题，并解决了阻尼因子控制和系统环路增益之间必须妥协的问题。 此外，本发明利用电容器共享技术来降低整个系统所需的米勒电容，并且加速输出电压的稳定性而不影响稳定性。

公开(公告)号：US20050218930A1

公开(公告)日：2005-10-06

申请号：US11087377

申请日：2005-03-22

Applicant: James Schleicher ,  Jim Park ,  Sergey Shumarayev ,  Bruce Pedersen ,  Tony Ngai ,  Wei-Jen Huang ,  Victor Maruri ,  Rakesh Patel

Inventor： James Schleicher ,  Jim Park ,  Sergey Shumarayev ,  Bruce Pedersen ,  Tony Ngai ,  Wei-Jen Huang ,  Victor Maruri ,  Rakesh Patel

IPC: G06F7/50 ,  G06F7/506 ,  H03K19/173 ,  H03K19/177

CPC classification number: G06F7/506 ,  H03K19/1737 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/17744 ,  H03K19/17792

Abstract: A programmable logic device has many regions of programmable logic, together with relatively general-purpose, programmable, interconnection resources that can be used to make interconnections between virtually any of the logic regions. In addition, various types of more local interconnection resources are associated with each logic region for facilitating the making of interconnections between adjacent or nearby logic regions without the need to use the general-purpose interconnection resources for those interconnections. The local interconnection resources support flexible clustering of logic regions via relatively direct and therefore high-speed interconnections, preferably in both horizontal and vertical directions in the typically two-dimensional array of logic regions. The logic region clustering options provided by the local interconnection resources are preferably boundary-less or substantially boundary-less within the array of logic regions.

公开(公告)号：US06912915B2

公开(公告)日：2005-07-05

申请号：US10717511

申请日：2003-11-21

Applicant: Yue-Ying Jian ,  Wen-Sheng Wu ,  Jien-Ren Chen ,  Wei-Jen Huang

Inventor： Yue-Ying Jian ,  Wen-Sheng Wu ,  Jien-Ren Chen ,  Wei-Jen Huang

IPC: G01L1/00 ,  G01N3/08 ,  G01N3/20 ,  G01N33/00 ,  H01L21/66

CPC classification number: G01N3/20

Abstract: An apparatus for shear testing bonds on 8″ and 12″ silicon substrates. The apparatus includes a removable platform for securing the 8″ wafer and a vacuum chuck for securing a 12″ wafer and the removable platform at the same time. A control module controls a moving mechanism to shift a probe to contact the solder ball of the 12″ substrate secured on the vacuum chuck or the solder ball of the 8″ wafer on the removable platform when the removable platform is fixed on the vacuum chuck. The moving mechanism moves the probe in a direction to separate the solder ball from the wafer. A sensor measures the pulling force exerted on the probe when the probe is moved in a direction and separates the solder ball from the wafer.

Abstract translation: 用于在8“和12”硅衬底上进行剪切测试的装置。 该装置包括用于固定8“晶片的可拆卸平台和用于同时固定12”晶片和可移除平台的真空卡盘。 控制模块控制移动机构以移动探头以将固定在真空吸盘上的12“基板的焊球或可移动平台上的8”晶片的焊球接触，当可移动平台固定在真空 卡盘 移动机构使探针沿着使焊球与晶片分离的方向移动。 当探针沿着一个方向移动并将焊球与晶片分离时，传感器测量施加在探针上的拉力。

公开(公告)号：US20050109117A1

公开(公告)日：2005-05-26

申请号：US10717511

申请日：2003-11-21

Applicant: Yue-Ying Jian ,  Wen-Sheng Wu ,  Jien-Ren Chen ,  Wei-Jen Huang

Inventor： Yue-Ying Jian ,  Wen-Sheng Wu ,  Jien-Ren Chen ,  Wei-Jen Huang

IPC: G01L1/00 ,  G01N3/08 ,  G01N3/20 ,  G01N33/00 ,  H01L21/66

CPC classification number: G01N3/20

Abstract: An apparatus for shear testing bonds on 8″ and 12″ silicon substrates. The apparatus includes a removable platform for securing the 8″ wafer and a vacuum chuck for securing a 12″ wafer and the removable platform at the same time. A control module controls a moving mechanism to shift a probe to contact the solder ball of the 12″ substrate secured on the vacuum chuck or the solder ball of the 8″ wafer on the removable platform when the removable platform is fixed on the vacuum chuck. The moving mechanism moves the probe in a direction to separate the solder ball from the wafer. A sensor measures the pulling force exerted on the probe when the probe is moved in a direction and separates the solder ball from the wafer.

Abstract translation: 用于在8“和12”硅衬底上进行剪切测试的装置。 该装置包括用于固定8“晶片的可拆卸平台和用于同时固定12”晶片和可移除平台的真空卡盘。 控制模块控制移动机构以移动探头以将固定在真空卡盘上的12“基板的焊球或可移动平台上的8”晶片的焊球接触，当可移动平台固定在真空 卡盘 移动机构使探针沿着使焊球与晶片分离的方向移动。 当探针沿着一个方向移动并将焊球与晶片分离时，传感器测量施加在探针上的拉力。

公开(公告)号：US06614261B2

公开(公告)日：2003-09-02

申请号：US10047618

申请日：2002-01-14

Applicant: Tony Ngai ,  Bruce Pedersen ,  Sergey Shumarayev ,  James Schleicher ,  Wei-Jen Huang ,  Victor Maruri ,  Rakesh Patel

Inventor： Tony Ngai ,  Bruce Pedersen ,  Sergey Shumarayev ,  James Schleicher ,  Wei-Jen Huang ,  Victor Maruri ,  Rakesh Patel

IPC: H03K19177

CPC classification number: G06F7/506 ,  H03K19/1737 ,  H03K19/177 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/1774 ,  H03K19/17744 ,  H03K19/17792

Abstract: A programmable logic integrated circuit device has a plurality of regions of programmable logic disposed on the device in a plurality of intersecting rows and columns of such regions. Interconnection resources (e.g., interconnection conductors, signal buffers/drivers, programmable connectors, etc.) are provided on the device for making programmable interconnections to, from, and/or between the regions. At least some of these interconnection resources are provided in two forms that are architecturally similar (e.g., with similar and substantially parallel routing) but that have significantly different signal propagation speed characteristics. For example, a major or larger portion of such dual-form interconnection resources may have what may be termed normal signal speed, while a smaller minor portion may have significantly faster signal speed. Secondary (e.g., clock and clear) signal distribution may also be enhanced, and so may be input/output circuitry and cascade connections between adjacent or nearby logic modules on the device.