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    Method of manufacturing semiconductor device
    21.
    发明授权
    Method of manufacturing semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号：US07713826B2

    公开(公告)日：2010-05-11

    申请号：US12045797

    申请日：2008-03-11

    申请人： Chel Jong Choi ,  Moon Gyu Jang ,  Yark Yeon Kim ,  Myung Sim Jun ,  Tae Youb Kim

    发明人： Chel Jong Choi ,  Moon Gyu Jang ,  Yark Yeon Kim ,  Myung Sim Jun ,  Tae Youb Kim

    IPC分类号： H01L21/336

    CPC分类号： H01L21/28229 ,  H01L21/28079 ,  H01L29/495 ,  H01L29/513 ,  H01L29/517 ,  H01L29/6659 ,  H01L29/7833

    摘要： Provided is a method of manufacturing a semiconductor device including a high-k dielectric thin layer formed using an interfacial reaction. The method includes the steps of: forming an oxide layer on a silicon substrate; depositing a metal layer on the oxide layer to form a metal silicate layer using an interfacial reaction between the oxide layer and the metal layer; forming a metal gate by etching the metal silicate layer and the metal layer; and forming a lightly doped drain (LDD) region and source and drain regions in the silicon substrate after forming the metal gate. In this method, a semiconductor device having high quality and performance can be manufactured by a simpler process at lower cost.

    摘要翻译： 提供一种制造包括使用界面反应形成的高k电介质薄层的半导体器件的方法。 该方法包括以下步骤：在硅衬底上形成氧化物层; 使用氧化物层和金属层之间的界面反应，在氧化物层上沉积金属层以形成金属硅酸盐层; 通过蚀刻金属硅酸盐层和金属层形成金属栅极; 以及在形成金属栅极之后在硅衬底中形成轻掺杂漏极（LDD）区域和源极和漏极区域。 在该方法中，可以通过更简单的工艺以较低的成本制造具有高品质和高性能的半导体器件。

    THERMOELECTRIC DEVICES
    24.
    发明申请
    THERMOELECTRIC DEVICES 有权
    热电装置

    公开(公告)号：US20130139864A1

    公开(公告)日：2013-06-06

    申请号：US13611189

    申请日：2012-09-12

    申请人： Younghoon Hyun ,  Moon Gyu Jang ,  Young Sam Park ,  Taehyoung Zyung ,  Yil Suk Yang ,  Jong-Kee Kwon

    发明人： Younghoon Hyun ,  Moon Gyu Jang ,  Young Sam Park ,  Taehyoung Zyung ,  Yil Suk Yang ,  Jong-Kee Kwon

    IPC分类号： H01L35/32 ,  H01L35/14 ,  H01L35/16 ,  B82Y99/00

    CPC分类号： H01L35/32 ,  B82Y30/00

    摘要： Provided is a thermoelectric device including two legs having a rough side surface and a smooth side surface facing each other. Phonons may be scattered by the rough side surface, thereby decreasing thermal conductivity of the device. Flowing paths for electrons and phonons may become different form each other, because of a magnetic field induced by an electric current passing through the legs. The smooth side surface may be used for the flowing path of electrons. As a result, in the thermoelectric device, thermal conductivity can be reduced and electric conductivity can be maintained.

    摘要翻译： 提供一种热电装置，其包括具有粗糙侧表面和彼此面对的平滑侧表面的两个腿。 声子可能被粗糙的侧面散射，从而降低了装置的热导率。 电子和声子的流动路径可能由于由通过腿部的电流引起的磁场而彼此不同。 光滑的侧面可以用于电子的流动路径。 结果，在热电装置中，可以降低导热性并且可以保持导电性。

    Semiconductor nanowire sensor device and method for manufacturing the same
    26.
    发明授权
    Semiconductor nanowire sensor device and method for manufacturing the same 有权
    半导体纳米线传感器装置及其制造方法

    公开(公告)号：US08241939B2

    公开(公告)日：2012-08-14

    申请号：US12682571

    申请日：2008-07-24

    申请人： Chan Woo Park ,  Chang Geun Ahn ,  Jong Heon Yang ,  In Bok Baek ,  Chil Seong Ah ,  Han Young Yu ,  An Soon Kim ,  Tae Youb Kim ,  Moon Gyu Jang ,  Myung Sim Jun

    发明人： Chan Woo Park ,  Chang Geun Ahn ,  Jong Heon Yang ,  In Bok Baek ,  Chil Seong Ah ,  Han Young Yu ,  An Soon Kim ,  Tae Youb Kim ,  Moon Gyu Jang ,  Myung Sim Jun

    IPC分类号： H01L21/00 ,  H01L29/06

    CPC分类号： H01L29/0665 ,  B82Y10/00 ,  B82Y15/00 ,  H01L29/0673 ,  H01L29/78696

    摘要： A method for manufacturing a biosensor includes forming a silicon nanowire channel, etching a first conductivity-type single crystalline silicon layer which is a top layer of a Silicon-On-Insulator (SOI) substrate to form a first conductivity-type single crystalline silicon line pattern, doping both sidewalls of the first conductivity-type single crystalline silicon line pattern with impurities of a second conductivity-type opposite to the first conductivity-type to form a second conductivity-type channel, forming second conductivity-type pads for forming electrodes at both ends of the first conductivity-type single crystalline silicon line pattern, forming, in an undoped region of the first conductivity-type single crystalline silicon line pattern, a first electrode for applying a reverse-bias voltage to insulate the first conductivity-type single crystalline silicon line pattern and the second conductivity-type channel from each other, and forming second electrodes for applying a bias voltage across the second conductivity-type channel on the second conductivity-type pad.

    摘要翻译： 制造生物传感器的方法包括形成硅纳米线通道，蚀刻作为绝缘体上硅（SOI）衬底的顶层的第一导电型单晶硅层，以形成第一导电型单晶硅线 以与第一导电类型相反的第二导电类型的杂质掺杂第一导电型单晶硅线图案的两个侧壁以形成第二导电型沟道，形成第二导电型垫，用于在 第一导电型单晶硅线图案的两端，在第一导电型单晶硅线图案的未掺杂区域中形成用于施加反向偏置电压以使第一导电型单晶硅线型图案绝缘的第一电极 晶体硅线图案和第二导电型沟道，并且形成用于施加双面的第二电极 在第二导电型垫上的第二导电类型沟道上的电压。

    SEMICONDUCTOR NANOWIRE SENSOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    28.
    发明申请
    SEMICONDUCTOR NANOWIRE SENSOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体纳米传感器器件及其制造方法

    公开(公告)号：US20100270530A1

    公开(公告)日：2010-10-28

    申请号：US12682571

    申请日：2008-07-24

    申请人： Chan Woo Park ,  Chang Geun Ahn ,  Jong Heon Yang ,  In Book Baek ,  Chil Seong Ah ,  Han Young Yu ,  An Soon Kim ,  Tae Youb Kim ,  Moon Gyu Jang ,  Myung Sim Jun

    发明人： Chan Woo Park ,  Chang Geun Ahn ,  Jong Heon Yang ,  In Book Baek ,  Chil Seong Ah ,  Han Young Yu ,  An Soon Kim ,  Tae Youb Kim ,  Moon Gyu Jang ,  Myung Sim Jun

    IPC分类号： H01L29/775 ,  H01L21/336

    CPC分类号： H01L29/0665 ,  B82Y10/00 ,  B82Y15/00 ,  H01L29/0673 ,  H01L29/78696

    摘要： A method for manufacturing a biosensor device is provided. The method involves forming a silicon nanowire channel with a line width of several nanometers to several tens of nanometers using a typical photolithography process, and using the channel to manufacture a semiconductor nanowire sensor device. The method includes etching a first conductivity-type single crystalline silicon layer which is a top layer of a Silicon-On-Insulator (SOI) substrate to form a first conductivity-type single crystalline silicon line pattern, doping both sidewalls of the first conductivity-type single crystalline silicon line pattern with impurities of a second conductivity-type opposite to the first conductivity-type to form a second conductivity-type channel, forming second conductivity-type pads for forming electrodes at both ends of the first conductivity-type single crystalline silicon line pattern, forming, in an undoped region of the first conductivity-type single crystalline silicon line pattern, a first electrode for applying a reverse-bias voltage to insulate the first conductivity-type single crystalline silicon line pattern and the second conductivity-type channel from each other, and forming second electrodes for applying a bias voltage across the second conductivity-type channel on the second conductivity-type pad.

    摘要翻译： 提供一种制造生物传感器装置的方法。 该方法包括使用典型的光刻工艺形成线宽为几纳米至几十纳米的硅纳米线通道，并使用该通道制造半导体纳米线传感器装置。 该方法包括蚀刻作为绝缘体上硅（SOI）衬底的顶层的第一导电型单晶硅层，以形成第一导电型单晶硅线图案，掺杂第一导电型单晶硅线阵列的两个侧壁， 形成具有与第一导电类型相反的第二导电类型的杂质的单晶硅线图案，以形成第二导电型沟道，形成用于在第一导电型单晶的两端形成电极的第二导电型焊盘 硅线图案，在第一导电型单晶硅线图案的未掺杂区域中形成第一电极，用于施加反向偏置电压以使第一导电型单晶硅线图案和第二导电型 并且形成用于在第二导通型通道上施加偏置电压的第二电极 导电型垫。

    Energy and power management integrated circuit device
    29.
    发明授权
    Energy and power management integrated circuit device 有权
    能源和电力管理集成电路设备

    公开(公告)号：US08378622B2

    公开(公告)日：2013-02-19

    申请号：US12708852

    申请日：2010-02-19

    申请人： Yil Suk Yang ,  Jong Dae Kim ,  Jae Woo Lee ,  Se Wan Heo ,  Moon Gyu Jang

    发明人： Yil Suk Yang ,  Jong Dae Kim ,  Jae Woo Lee ,  Se Wan Heo ,  Moon Gyu Jang

    IPC分类号： H01M10/44 ,  H02J1/00

    CPC分类号： H02J7/0068 ,  H01M10/46 ,  Y10T307/25 ,  Y10T307/305 ,  Y10T307/391 ,  Y10T307/414

    摘要： Provided is an energy and power management integrated circuit (IC) device. The energy and power management IC device includes a plurality of energy conversion devices for harvesting energy from respective energy conversion sources and converting the energy into electric energy, an energy management IC (EMIC) for converting the electric energy converted by the energy conversion devices into stable energy, a storage device for storing the energy or power converted by the EMIC, a power management IC (PMIC) for receiving and distributing the power stored in the storage device, and a plurality of output load devices for consuming the power distributed by the PMIC. Accordingly, it is possible to harvest energy in an environmentally friendly way and semi-permanently use the energy without changing a battery.

    摘要翻译： 提供了一种能量和电源管理集成电路（IC）装置。 能量和电力管理IC装置包括多个能量转换装置，用于从各自的能量转换源收集能量并将能量转换成电能;能量管理IC（EMIC），用于将由能量转换装置转换的电能转换成稳定的 能量，用于存储由EMIC转换的能量或功率的存储装置，用于接收和分配存储在存储装置中的电力的电力管理IC（PMIC）以及用于消耗由PMIC分配的功率的多个输出负载装置 。 因此，可以以环保的方式收获能量，并且半永久地使用能量而不改变电池。

    APPARATUS AND METHOD FOR EXTRACTING MAXIMUM POWER FROM SOLAR CELL
    30.
    发明申请
    APPARATUS AND METHOD FOR EXTRACTING MAXIMUM POWER FROM SOLAR CELL 失效
    从太阳能电池提取最大功率的装置和方法

    公开(公告)号：US20110140680A1

    公开(公告)日：2011-06-16

    申请号：US12878443

    申请日：2010-09-09

    申请人： Se Wan HEO ,  Yil Suk Yang ,  Jae Woo Lee ,  Moon Gyu Jang ,  Jong Dae Kim

    发明人： Se Wan HEO ,  Yil Suk Yang ,  Jae Woo Lee ,  Moon Gyu Jang ,  Jong Dae Kim

    IPC分类号： G05F3/02 ,  H02J7/00

    CPC分类号： H02J7/35 ,  G05F1/67 ,  Y02E10/566 ,  Y02E10/58

    摘要： An apparatus and method for extracting maximum power from a solar cell are provided. The apparatus includes a solar cell for producing power from solar energy, a maximum power extractor for generating a pulse width modulation signal for extracting the maximum power from the solar cell, and a DC-DC converter for adjusting an amount of current generated from the solar cell according to the pulse width modulation signal.

    摘要翻译： 提供一种从太阳能电池提取最大功率的装置和方法。 该装置包括用于从太阳能产生电能的太阳能电池，用于产生用于从太阳能电池提取最大功率的脉宽调制信号的最大功率提取器，以及用于调节从太阳能产生的电流量的DC-DC转换器 单元根据脉宽调制信号。