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149 条记录 (耗时 0.038 秒)

    Semiconductor memory device
    21.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号：US07995379B2

    公开(公告)日：2011-08-09

    申请号：US12396559

    申请日：2009-03-03

    申请人： Yoshihiro Ueda

    发明人： Yoshihiro Ueda

    IPC分类号： G11C11/00

    CPC分类号： G11C11/16 ,  G11C7/062 ,  G11C7/065 ,  G11C29/12 ,  G11C29/12005 ,  G11C2029/1204 ,  G11C2029/5006

    摘要： A semiconductor memory device includes a sense amplifier that compares intensities of currents flowing through a first node and a second node with each other, a first MOSFET having a drain terminal connected with the first node, a second MOSFET having a drain terminal connected with the second node, a memory cell connected with a source terminal of the first MOSFET, and a reference cell. The semiconductor memory device further includes a connection control circuit that connects a source terminal of the second MOSFET with the reference cell at the time of a regular operation and connects the source terminal of the second MOSFET with a reference voltage terminal at the time of a test operation.

    摘要翻译： 半导体存储器件包括：读出放大器，其将流过第一节点和第二节点的电流的强度相互比较;第一MOSFET，具有与第一节点连接的漏极端子;第二MOSFET，漏极端子与第二节点连接;第二MOSFET， 节点，与第一MOSFET的源极端子连接的存储单元和参考单元。 半导体存储器件还包括连接控制电路，其在正常操作时将第二MOSFET的源极端子与参考单元连接，并且在测试时将第二MOSFET的源极端子与参考电压端子连接 操作。

    Magnetoresistive random access memory
    22.
    发明授权
    Magnetoresistive random access memory 有权
    磁阻随机存取存储器

    公开(公告)号：US07791930B2

    公开(公告)日：2010-09-07

    申请号：US12164410

    申请日：2008-06-30

    申请人： Yoshihiro Ueda

    发明人： Yoshihiro Ueda

    IPC分类号： G11C11/00 ,  G11C5/08 ,  G11C11/14

    CPC分类号： G11C11/15 ,  G11C11/1673

    摘要： A MRAM includes a first magnetoresistive effect (MR) element that takes a low and high resistance states. A second MR element is fixed to a low or high resistance state. First and second MOSFETs are connected to the first and second MR elements, respectively. A sense amplifier amplifies a difference between values of current flowing through the first and second MOSFETs. A current circuit outputs reference current whose value lies between current flowing through the first MR element of the low and high resistance states. A third MOSFET has one end that receives the reference current and is connected to its own gate terminal. The gate terminal of the second MOSFET receives the same potential as the gate terminal of the third MOSFET. A first resistance element is connected to the others end of the third MOSFET and has the same resistance as the second magnetoresistive effect element.

    摘要翻译： MRAM包括采用低和高电阻状态的第一磁阻效应（MR）元件。 第二MR元件固定为低电阻或高电阻状态。 第一和第二MOSFET分别连接到第一和第二MR元件。 读出放大器放大流经第一和第二MOSFET的电流值之差。 电流电路输出其值位于流过低电阻状态和高电阻状态的第一MR元件的电流之间的参考电流。 第三个MOSFET的一端接收参考电流并连接到其自己的栅极端子。 第二MOSFET的栅极端子接收与第三MOSFET的栅极端子相同的电位。 第一电阻元件连接到第三MOSFET的另一端，并且具有与第二磁阻效应元件相同的电阻。

    Magnetoresistive random access memory and method of manufacturing the same
    24.
    发明授权
    Magnetoresistive random access memory and method of manufacturing the same 失效
    磁阻随机存取存储器及其制造方法

    公开(公告)号：US07772660B2

    公开(公告)日：2010-08-10

    申请号：US12119720

    申请日：2008-05-13

    申请人： Yoshihiro Ueda

    发明人： Yoshihiro Ueda

    IPC分类号： H01L29/82 ,  H01L43/00

    CPC分类号： G11C11/16 ,  B82Y10/00 ,  H01L27/228

    摘要： A magnetic random access memory includes a transistor having a gate electrode formed above a surface of a substrate, and first and second impurity diffusion regions which sandwich a channel region below the gate electrode, a first plug formed on the first impurity diffusion region, a recording element formed on the first plug, including a plurality of stacked layers, and configured to hold information in accordance with an internal magnetization state, a first signal line formed on the recording element, a second plug formed on the second impurity diffusion region, an electrical conductor formed on the second plug, an area of a shape of the electrical conductor, which is projected onto the surface of the substrate, being larger than that of a shape of the recording element, which is projected onto the surface of the substrate, and a second signal line formed on the electrical conductor.

    摘要翻译： 磁性随机存取存储器包括晶体管，其具有形成在衬底表面上的栅电极，以及夹在栅电极下方的沟道区的第一和第二杂质扩散区，形成在第一杂质扩散区上的第一插塞， 元件，形成在第一插头上，包括多个堆叠层，并且被配置为根据内部磁化状态保存信息，形成在记录元件上的第一信号线，形成在第二杂质扩散区上的第二插塞，电 导体形成在第二插头上，突出到基板的表面上的电导体的形状的面积大于投影到基板的表面上的记录元件的形状， 形成在电导体上的第二信号线。

    SEMICONDUCTOR MEMORY DEVICE
    27.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号：US20090225586A1

    公开(公告)日：2009-09-10

    申请号：US12396559

    申请日：2009-03-03

    申请人： Yoshihiro Ueda

    发明人： Yoshihiro Ueda

    IPC分类号： G11C11/02 ,  G11C7/06 ,  G11C7/00 ,  G11C29/00

    CPC分类号： G11C11/16 ,  G11C7/062 ,  G11C7/065 ,  G11C29/12 ,  G11C29/12005 ,  G11C2029/1204 ,  G11C2029/5006

    摘要： A semiconductor memory device includes a sense amplifier that compares intensities of currents flowing through a first node and a second node with each other, a first MOSFET having a drain terminal connected with the first node, a second MOSFET having a drain terminal connected with the second node, a memory cell connected with a source terminal of the first MOSFET, and a reference cell. The semiconductor memory device further includes a connection control circuit that connects a source terminal of the second MOSFET with the reference cell at the time of a regular operation and connects the source terminal of the second MOSFET with a reference voltage terminal at the time of a test operation.

    摘要翻译： 半导体存储器件包括：读出放大器，其将流过第一节点和第二节点的电流的强度相互比较;第一MOSFET，具有与第一节点连接的漏极端子;第二MOSFET，漏极端子与第二节点连接;第二MOSFET， 节点，与第一MOSFET的源极端子连接的存储单元和参考单元。 半导体存储器件还包括连接控制电路，其在正常操作时将第二MOSFET的源极端子与参考单元连接，并且在测试时将第二MOSFET的源极端子与参考电压端子连接 操作。

    Suspension Structure for a Work Machine
    28.
    发明申请
    Suspension Structure for a Work Machine 有权
    工作机械悬架结构

    公开(公告)号：US20090020975A1

    公开(公告)日：2009-01-22

    申请号：US12062162

    申请日：2008-04-03

    申请人： Kenichi Iwami ,  Shigeki Hayashi ,  Yoshihiro Ueda

    发明人： Kenichi Iwami ,  Shigeki Hayashi ,  Yoshihiro Ueda

    IPC分类号： B60G17/04

    CPC分类号： B60G17/056 ,  B60G2300/082 ,  B60G2400/252 ,  B60G2500/302

    摘要： An arrangement is provided in which the durability of an operation changing means is improved when this means is provided to the suspension mechanism in a suspension structure for a work vehicle. A maximum position (A1) and minimum position (A2) of the operation of the suspension mechanism are detected, and an intermediate position (B1) between the maximum and minimum positions (A1) and (A2) is detected. When the intermediate position (B1) departs from the target range (H1), the operation of the suspension mechanism is changed to the body raising side or body lowering side so that the intermediate position (B1) moves toward the target range (H1).

    摘要翻译： 提供一种装置，其中当在用于工作车辆的悬挂结构中的悬挂机构上提供这种装置时，改进操作改变装置的耐久性。 检测悬架机构的操作的最大位置（A1）和最小位置（A2），并且检测最大和最小位置（A1）和（A2）之间的中间位置（B1）。 当中间位置（B1）离开目标范围（H1）时，悬架机构的操作变为主体侧或身体下降侧，使得中间位置（B1）朝向目标范围（H1）移动。

    SENSE AMPLIFIER
    29.
    发明申请
    SENSE AMPLIFIER 有权
    感应放大器

    公开(公告)号：US20070280021A1

    公开(公告)日：2007-12-06

    申请号：US11749412

    申请日：2007-05-16

    申请人： Yoshihiro Ueda ,  Yoshihisa Iwata ,  Toshiaki Edahiro ,  Toshihiro Suzuki

    发明人： Yoshihiro Ueda ,  Yoshihisa Iwata ,  Toshiaki Edahiro ,  Toshihiro Suzuki

    IPC分类号： G11C11/00 ,  G11C7/02

    CPC分类号： G11C7/065 ,  G11C7/062 ,  G11C7/12 ,  G11C11/1673 ,  G11C16/0491 ,  G11C16/26 ,  G11C17/126 ,  G11C2207/002 ,  G11C2207/063

    摘要： A sense amplifier according to an example of the present invention has first, second, third and fourth FETs with a flip-flop connection. A drain of a fifth FET is connected to a first input node, and its source is connected to a power source node. A drain of a sixth FET is connected to a second input node, and its source is connected to the power source node. A sense operation is started by charging a first output node from the first input node with a first current and by charging a second output node from the second input node with a second current. The fifth and sixth FET are turned on after starting the sense operation.

    摘要翻译： 根据本发明的示例的读出放大器具有触发器连接的第一，第二，第三和第四FET。 第五FET的漏极连接到第一输入节点，并且其源极连接到电源节点。 第六FET的漏极连接到第二输入节点，其源极连接到电源节点。 通过用第一电流从第一输入节点充电第一输出节点并且通过用第二电流从第二输入节点充电第二输出节点来开始感测操作。 开始感测操作后，第五和第六FET导通。

    Document Use Tracking System, Method, Computer Readable Medium, And Computer Data Signal
    30.
    发明申请
    Document Use Tracking System, Method, Computer Readable Medium, And Computer Data Signal 失效
    文件使用跟踪系统，方法，计算机可读介质和计算机数据信号

    公开(公告)号：US20070265994A1

    公开(公告)日：2007-11-15

    申请号：US11553611

    申请日：2006-11-09

    申请人： Yoshihiro Ueda

    发明人： Yoshihiro Ueda

    IPC分类号： G06F17/30

    CPC分类号： G06F17/30011 ,  G06F21/552 ,  G06F2221/2101 ,  Y10S707/99931 ,  Y10S707/99935

    摘要： There is provided a document use tracking system including a use history recording unit that records, for each document stored in a document storage unit, a use history record for each user about each element in the document, a search condition reception unit that receives an input of a search condition, an element score calculation unit that calculates, for each element of each document, an element score indicating closeness of fit of the element for the search condition, an importance score calculation unit that calculates, for each combination of an element and a user who has performed an operation, an importance score based on the element score of the element and the use history record of the user for the element, and a monitored object information presentation unit that presents the importance score calculated by the importance score calculation unit and the user corresponding to the importance score.

    摘要翻译： 提供了一种文件使用跟踪系统，其包括使用历史记录单元，其针对存储在文档存储单元中的每个文档记录关于每个用户关于文档中的每个元素的使用历史记录，接收输入的搜索条件接收单元 搜索条件的元素分数计算单元，针对每个文档的每个元素计算表示搜索条件的元素的拟合度的元素分数，重要度分数计算单元，对于元素的每个组合和 已经执行了操作的用户，基于元素的元素分数的重要性得分和该元素的用户的使用历史记录，以及监视对象信息呈现单元，其呈现由重要度得分计算单元计算出的重要度得分 并且用户对应于重要性得分。