PWM Loop Filter with Minimum Aliasing Error
    21.
    发明申请
    PWM Loop Filter with Minimum Aliasing Error 有权
    具有最小混叠误差的PWM环路滤波器

    公开(公告)号:US20080297244A1

    公开(公告)日:2008-12-04

    申请号:US12128193

    申请日:2008-05-28

    IPC分类号: H03F3/38 H03F3/217 H03B1/04

    CPC分类号: H03F3/217 H03H7/06 H03H7/07

    摘要: One embodiment of an apparatus for filtering an electrical signal includes a loop filter with an input and an output that applies a transfer function to a signal at the input. The transfer function has substantially no real part. The loop filter has a dominant pole placed substantially at or above an upper frequency in the frequency range of interest for the loop filter.

    摘要翻译: 用于滤波电信号的装置的一个实施例包括环路滤波器,其具有对输入端的信号施加传递函数的输入端和输出端。 传递函数基本上没有实质。 环路滤波器在环路滤波器感兴趣的频率范围内具有基本上位于或高于上限频率的主极。

    Differential Oscillator Device with Pulsed Power Supply, and Related Driving Method
    22.
    发明申请
    Differential Oscillator Device with Pulsed Power Supply, and Related Driving Method 有权
    具脉冲电源的差分振荡器及相关驱动方法

    公开(公告)号:US20080218280A1

    公开(公告)日:2008-09-11

    申请号:US11813160

    申请日:2005-12-22

    申请人: Fabrizio Palma

    发明人: Fabrizio Palma

    IPC分类号: H03B1/04

    摘要: The present invention concerns a differential oscillator device, comprising resonant electronic means, capable to provide on at least two terminals at least one oscillating signal VOUT, which comprises a generator electronic means capable to supply at least one power supply pulsed signal to said resonant electronic means in phase relation with said at least one oscillating signal VOUT. The present invention further concerns a process of supplying pulsed power to such a differential oscillator device.

    摘要翻译: 本发明涉及一种包括谐振电子装置的差分振荡器装置,其能够在至少两个端子上提供至少一个振荡信号V OUT,该振荡信号包括发生器电子装置,其能够提供至少一个功率 向所述谐振电子装置提供与所述至少一个振荡信号V OUT OUT相位关系的脉冲信号。 本发明还涉及向这种差分振荡器装置提供脉冲功率的过程。

    Oscillator bias injector
    23.
    发明申请
    Oscillator bias injector 审中-公开
    振荡器偏置注入器

    公开(公告)号:US20080204130A1

    公开(公告)日:2008-08-28

    申请号:US11712066

    申请日:2007-02-28

    IPC分类号: H03B1/04

    CPC分类号: H03B5/00 H04B1/18

    摘要: A oscillator bias injector system for use in maritime applications in connection with a VSAT communication system including a satellite modem connected to a commercially available high power block upconverter and low noise block downconverter which are both connected to an outdoor antenna mounted on a stabilized platform, which antenna sends and receives signals from a Ku-band satellite in geosynchronous orbit. The oscillator bias injector is installed between the block upconverter and the satellite modem such that the RF signal generated by satellite modem is combined with an internally generated stabilized 10 MHz reference signal from oscillator, which summed signal is then combined with DC bias generated by an AC rectifier to thereby provide a means of interfacing a custom designed modem to the block upconverter to improve the uplink speed of the VSAT system. The improved speed allows the user to use the telecommunications system for applications that require a higher transfer rate, such as video teleconferencing and voice over Internet phones.

    摘要翻译: 一种振荡器偏置注入器系统,用于与包括连接到市售的大功率块上变频器的卫星调制解调器和连接到安装在稳定平台上的室外天线的低噪声块下变频器的VSAT通信系统相关的海上应用中, 天线在地球同步轨道上发送和接收来自Ku波段卫星的信号。 振荡器偏置注入器安装在块上变频器和卫星调制解调器之间,使得由卫星调制解调器产生的RF信号与来自振荡器的内部产生的稳定的10MHz参考信号组合,然后将相加的信号与由AC产生的DC偏置 整流器,从而提供将定制设计的调制解调器连接到块上变频器的手段,以改善VSAT系统的上行链路速度。 改进的速度允许用户将电信系统用于需要更高传输速率的应用,例如视频电话会议和互联网电话上的语音。

    HIGH-FREQUENCY OSCILLATOR
    24.
    发明申请
    HIGH-FREQUENCY OSCILLATOR 审中-公开
    高频振荡器

    公开(公告)号:US20080143447A1

    公开(公告)日:2008-06-19

    申请号:US11690255

    申请日:2007-03-23

    IPC分类号: H03B1/04

    摘要: Provided is a high-frequency oscillator whose output power increases without a change in physical size of the entire high-frequency oscillator and deterioration of a phase noise characteristic. The high-frequency oscillator for harmonic extraction includes: an active element (5); a fundamental reflection stub (9) provided on a signal line located on an output side of the active element (5); an output terminal (4); and a harmonic impedance converting circuit (3) interposed between the fundamental reflection stub (9) and the output terminal (4), for converting a harmonic output terminal side load impedance into an optimum value for maximizing harmonic output power, the optimum value being obtained in advance.

    摘要翻译: 提供一种高频振荡器,其输出功率增加而不会导致整个高频振荡器的物理尺寸的变化和相位噪声特性的劣化。 用于谐波提取的高频振荡器包括:有源元件(5); 设置在位于有源元件(5)的输出侧的信号线上的基本反射短截线(9)。 输出端子(4); 以及介于所述基本反射短截线(9)和所述输出端子(4)之间的谐波阻抗转换电路(3),用于将谐波输出端子侧负载阻抗转换成用于使谐波输出功率最大化的最佳值,获得最佳值 提前。

    Power amplifier
    25.
    发明申请
    Power amplifier 有权
    功率放大器

    公开(公告)号:US20080094142A1

    公开(公告)日:2008-04-24

    申请号:US11822906

    申请日:2007-07-11

    IPC分类号: H03F3/04 H03B1/04

    CPC分类号: H03F3/189 H03F1/56

    摘要: A power amplifier amplifies an input signal having a fundamental frequency of which band width ranges between a first fundamental frequency F1 and a second fundamental frequency F2. The power amplifier includes a power amplifier transistor for amplifying the input signal and an output matching circuit for suppressing a harmonic component included in an output signal from the power amplifier transistor. The output matching circuit includes: a first second-order harmonic series resonant circuit including a first inductor and a first capacitor and having a frequency twice as large as F1 as a resonance frequency; and a second second-order harmonic series resonant circuit including a second inductor and a second capacitor and having a frequency twice as large as F2 as a resonance frequency.

    摘要翻译: 功率放大器放大具有在第一基本频率F 1和第二基本频率F 2之间的带宽范围的基本频率的输入信号。 功率放大器包括用于放大输入信号的功率放大器晶体管和用于抑制包括在功率放大器晶体管的输出信号中的谐波分量的输出匹配电路。 输出匹配电路包括:第一二次谐波串联谐振电路,包括第一电感器和第一电容器,并且具有作为共振频率的F 1的两倍的频率; 以及包括第二电感器和第二电容器并且具有作为共振频率的F 2的两倍的频率的第二二次谐波串联谐振电路。

    Polyphase numerically controlled oscillator and method for operating the same
    26.
    发明授权
    Polyphase numerically controlled oscillator and method for operating the same 有权
    多相数控振荡器及其操作方法

    公开(公告)号:US07109808B1

    公开(公告)日:2006-09-19

    申请号:US11007613

    申请日:2004-12-07

    申请人: Robert Pelt

    发明人: Robert Pelt

    IPC分类号: H03B1/04

    CPC分类号: G06F1/0328 G06F1/0342

    摘要: A polyphase numerically controlled oscillator (PNCO) is defined to include a plurality of sub-numerically controller oscillators (SNCO's). Each SNCO is capable of receiving a clock signal at a first clock rate and an assigned phase offset signal. Each SNCO is configured to generate a digital waveform for the assigned phase offset signal. The PNCO also includes a plurality of frequency multipliers for generating a frequency multiplied representation of the digital waveform generated by each SNCO. The PNCO further includes a multiplexer configured to receive output from each of the frequency multipliers according to the first clock rate. The multiplexer is further configured to receive a select signal, wherein the select signal triggers the multiplexer at a second clock rate.

    摘要翻译: 多相数控振荡器(PNCO)被定义为包括多个子数字控制振荡器(SNCO)。 每个SNCO能够以第一时钟速率和所分配的相位偏移信号接收时钟信号。 每个SNCO被配置为产生用于所分配的相位偏移信号的数字波形。 PNCO还包括用于产生由每个SNCO产生的数字波形的倍频表示的多个频率乘法器。 PNCO还包括被配置为根据第一时钟速率从每个频率乘法器接收输出的多路复用器。 多路复用器还被配置为接收选择信号,其中选择信号以第二时钟速率触发多路复用器。

    Integrated circuits for voltage controlled oscillators
    27.
    发明授权
    Integrated circuits for voltage controlled oscillators 有权
    用于压控振荡器的集成电路

    公开(公告)号:US6140884A

    公开(公告)日:2000-10-31

    申请号:US277488

    申请日:1999-03-26

    IPC分类号: H03B1/04 H03B5/12 H03B5/00

    摘要: An integrated circuit (shown below dashed line A--A) for a voltage controlled oscillator comprises a first transistor (T.sub.1) having its collector coupled to a first port (Port 1) via a filter comprising a capacitor (C.sub.f) and an inductor (L.sub.f) and its emitter coupled to the emitter of a second transistor (T.sub.2) whose collector is coupled to a second port (Port 2). The collector of the first transistor is also coupled via a capacitive divider (C.sub.1, C.sub.2) to the base of the second transistor. The base of the first transistor is AC decoupled (C.sub.3). The emitters of the first and second transistors are fed by a current source (I.sub.1). A capacitor (C.sub.s) connects the base of the second transistor to the first port. The first and second ports are for connection to an external resonator (L.sub.1, D.sub.1, C.sub.p, L.sub.p) (shown above dashed line A--A) where C.sub.p and L.sub.p are parasitic capacitances and inductances respectively, the latter being typically bond wires connecting the ports to the rest of the external resonator. The filter (C.sub.f, L.sub.f) causes the circuit to exhibit negative impedance across the first and second ports. A VCO embodying the invention is tunable across the intended frequency range without exhibiting frequency hopping or mode switching.

    摘要翻译: 用于压控振荡器的集成电路(如虚线AA所示)包括通过包括电容器(Cf)和电感器(Lf)的滤波器将其集电极耦合到第一端口(端口1)的第一晶体管(T1)和 其发射极耦合到第二晶体管(T2)的发射极,第二晶体管的集电极耦合到第二端口(端口2)。 第一晶体管的集电极还经由电容分压器(C1,C2)耦合到第二晶体管的基极。 第一晶体管的基极为AC去耦(C3)。 第一和第二晶体管的发射极由电流源(I1)馈送。 电容器(Cs)将第二晶体管的基极连接到第一端口。 第一和第二端口用于连接到外部谐振器(L1,D1,Cp,Lp)(如虚线AA所示),其中Cp和Lp分别是寄生电容和电感,后者通常是将端口连接到 其余的外部谐振器。 滤波器(Cf,Lf)使电路在第一和第二端口上呈现负阻抗。 体现本发明的VCO可以在预期的频率范围内是可调谐的,而不会出现跳频或模式切换。

    Tunable low noise oscillator using delay lines and ring mode trap filter
    28.
    发明授权
    Tunable low noise oscillator using delay lines and ring mode trap filter 失效
    可调谐低噪声振荡器采用延迟线和环形陷波滤波器

    公开(公告)号:US6091309A

    公开(公告)日:2000-07-18

    申请号:US13355

    申请日:1998-01-26

    IPC分类号: H03B5/12 H03B1/04 H03B5/18

    摘要: An oscillator comprises an active device with a phase shift of less than 180 degrees. A first delay line has first and second ends. The first end of the first delay line is coupled to an active port of the active device. A ring mode trap filter is coupled to the second end of the first delay line. A second delay line has first and second ends. The first end of the second delay line is coupled to the ring mode trap filter. The second end of the second delay line is coupled to a resonance means. The total delay of the first and second delay lines allows the resonance means to oscillate at its natural frequency in spite of the less-than-180-degree phase shift of the active device.

    摘要翻译: 振荡器包括相移小于180度的有源器件。 第一延迟线具有第一和第二端。 第一延迟线的第一端耦合到有源器件的有效端口。 环形陷波滤波器耦合到第一延迟线的第二端。 第二延迟线具有第一和第二端。 第二延迟线的第一端耦合到环形陷波滤波器。 第二延迟线的第二端耦合到谐振装置。 第一和第二延迟线的总延迟允许谐振装置以其固有频率振荡,尽管有源装置的相位偏移小于180度。