摘要:
One embodiment of an apparatus for filtering an electrical signal includes a loop filter with an input and an output that applies a transfer function to a signal at the input. The transfer function has substantially no real part. The loop filter has a dominant pole placed substantially at or above an upper frequency in the frequency range of interest for the loop filter.
摘要:
The present invention concerns a differential oscillator device, comprising resonant electronic means, capable to provide on at least two terminals at least one oscillating signal VOUT, which comprises a generator electronic means capable to supply at least one power supply pulsed signal to said resonant electronic means in phase relation with said at least one oscillating signal VOUT. The present invention further concerns a process of supplying pulsed power to such a differential oscillator device.
摘要翻译:本发明涉及一种包括谐振电子装置的差分振荡器装置,其能够在至少两个端子上提供至少一个振荡信号V OUT,该振荡信号包括发生器电子装置,其能够提供至少一个功率 向所述谐振电子装置提供与所述至少一个振荡信号V OUT OUT相位关系的脉冲信号。 本发明还涉及向这种差分振荡器装置提供脉冲功率的过程。
摘要:
A oscillator bias injector system for use in maritime applications in connection with a VSAT communication system including a satellite modem connected to a commercially available high power block upconverter and low noise block downconverter which are both connected to an outdoor antenna mounted on a stabilized platform, which antenna sends and receives signals from a Ku-band satellite in geosynchronous orbit. The oscillator bias injector is installed between the block upconverter and the satellite modem such that the RF signal generated by satellite modem is combined with an internally generated stabilized 10 MHz reference signal from oscillator, which summed signal is then combined with DC bias generated by an AC rectifier to thereby provide a means of interfacing a custom designed modem to the block upconverter to improve the uplink speed of the VSAT system. The improved speed allows the user to use the telecommunications system for applications that require a higher transfer rate, such as video teleconferencing and voice over Internet phones.
摘要:
Provided is a high-frequency oscillator whose output power increases without a change in physical size of the entire high-frequency oscillator and deterioration of a phase noise characteristic. The high-frequency oscillator for harmonic extraction includes: an active element (5); a fundamental reflection stub (9) provided on a signal line located on an output side of the active element (5); an output terminal (4); and a harmonic impedance converting circuit (3) interposed between the fundamental reflection stub (9) and the output terminal (4), for converting a harmonic output terminal side load impedance into an optimum value for maximizing harmonic output power, the optimum value being obtained in advance.
摘要:
A power amplifier amplifies an input signal having a fundamental frequency of which band width ranges between a first fundamental frequency F1 and a second fundamental frequency F2. The power amplifier includes a power amplifier transistor for amplifying the input signal and an output matching circuit for suppressing a harmonic component included in an output signal from the power amplifier transistor. The output matching circuit includes: a first second-order harmonic series resonant circuit including a first inductor and a first capacitor and having a frequency twice as large as F1 as a resonance frequency; and a second second-order harmonic series resonant circuit including a second inductor and a second capacitor and having a frequency twice as large as F2 as a resonance frequency.
摘要:
A polyphase numerically controlled oscillator (PNCO) is defined to include a plurality of sub-numerically controller oscillators (SNCO's). Each SNCO is capable of receiving a clock signal at a first clock rate and an assigned phase offset signal. Each SNCO is configured to generate a digital waveform for the assigned phase offset signal. The PNCO also includes a plurality of frequency multipliers for generating a frequency multiplied representation of the digital waveform generated by each SNCO. The PNCO further includes a multiplexer configured to receive output from each of the frequency multipliers according to the first clock rate. The multiplexer is further configured to receive a select signal, wherein the select signal triggers the multiplexer at a second clock rate.
摘要:
An integrated circuit (shown below dashed line A--A) for a voltage controlled oscillator comprises a first transistor (T.sub.1) having its collector coupled to a first port (Port 1) via a filter comprising a capacitor (C.sub.f) and an inductor (L.sub.f) and its emitter coupled to the emitter of a second transistor (T.sub.2) whose collector is coupled to a second port (Port 2). The collector of the first transistor is also coupled via a capacitive divider (C.sub.1, C.sub.2) to the base of the second transistor. The base of the first transistor is AC decoupled (C.sub.3). The emitters of the first and second transistors are fed by a current source (I.sub.1). A capacitor (C.sub.s) connects the base of the second transistor to the first port. The first and second ports are for connection to an external resonator (L.sub.1, D.sub.1, C.sub.p, L.sub.p) (shown above dashed line A--A) where C.sub.p and L.sub.p are parasitic capacitances and inductances respectively, the latter being typically bond wires connecting the ports to the rest of the external resonator. The filter (C.sub.f, L.sub.f) causes the circuit to exhibit negative impedance across the first and second ports. A VCO embodying the invention is tunable across the intended frequency range without exhibiting frequency hopping or mode switching.
摘要:
An oscillator comprises an active device with a phase shift of less than 180 degrees. A first delay line has first and second ends. The first end of the first delay line is coupled to an active port of the active device. A ring mode trap filter is coupled to the second end of the first delay line. A second delay line has first and second ends. The first end of the second delay line is coupled to the ring mode trap filter. The second end of the second delay line is coupled to a resonance means. The total delay of the first and second delay lines allows the resonance means to oscillate at its natural frequency in spite of the less-than-180-degree phase shift of the active device.
摘要:
A balanced frequency responsive circuit comprising circuit components formed in a semiconductor chip having first and second on-chip contact terminals which connect to first and second off-chip contact terminals, respectively, and a balanced parallel resonator circuit coupled to the contact terminals. The resonator circuit comprises a capacitance portion and an inductance portion. Part of the capacitance portion is on-chip connected between the first and second on-chip contact terminals. Another part of the capacitance portion and the inductance portion are off-chip series connected between the first and second off-chip contact terminals such that the contact terminals are comprised in a single resonant loop, essentially producing no spurious resonance signals.
摘要:
A microstripline resonator in which a desirable resonant frequency can be adjusted with less deterioration in Q and less production process steps is characterized in that a hollowed-out portion is formed in an electrode portion provided on an insulating substrate base. A width-narrowed portion is provided between the side edge of the electrode portion and the hollowed-out portion for adjusting the resonant frequency of the microstripline resonator.