Traffic shaper and packet communication apparatus
    21.
    发明授权
    Traffic shaper and packet communication apparatus 失效
    流量整形器和分组通信装置

    公开(公告)号:US5640389A

    公开(公告)日:1997-06-17

    申请号:US518385

    申请日:1995-08-15

    摘要: A traffic shaper in a packet communication apparatus receives packets and immediately calculates a departure time for each received packet, using designated bandwidth allocation parameters. The packets are stored in a packet memory according to their calculated departure times. When each departure time arrives, the packets that have been stored for that departure time are transferred to an output queue. Packets are output in sequential order from the output queue.

    摘要翻译: 分组通信装置中的流量整形器使用指定的带宽分配参数接收分组并立即计算每个接收分组的出发时间。 分组根据其计算的出发时间被存储在分组存储器中。 当每个出发时间到达时,已经为该出发时间存储的分组被传送到输出队列。 从输出队列中按顺序输出数据包。

    Packet processing method and related device

    公开(公告)号:US11616738B2

    公开(公告)日:2023-03-28

    申请号:US17087087

    申请日:2020-11-02

    摘要: A packet processing method and device are provided, to save CPU resources consumed by parsing a packet. The method includes: parsing, by an intelligent network interface card, a received first packet to obtain an identifier of the first packet; updating, by the intelligent network interface card, a control field of a first memory buffer based on the identifier of the first packet; storing, by the intelligent network interface card, a payload of the first packet or a packet header and a payload of the first packet into the first address space through DMA based on an aggregation position of the first packet; aggregating, by a host, the first address information and at least one piece of second address information based on an updated control field in the first mbuf; and reading, by a virtual machine, address information, to obtain data in an address space indicated by the address information.

    Flow Control Device and Method
    24.
    发明申请

    公开(公告)号:US20210051117A1

    公开(公告)日:2021-02-18

    申请号:US16963544

    申请日:2019-02-08

    摘要: A flow control device includes an analysis unit identifying a flow of a received packet, a plurality of queues temporarily storing packets sorted according to each flow, an allocation information storage unit storing allocation information regarding a queue allocated for each flow, a sorting unit deciding a queue to be a storage destination of the received packet and sorts the packet based on a result identified by the analysis unit and the allocation information, a saved packet holding unit saving a packet belonging to a flow determined to have no allocation information regarding the queue to be allocated by the sorting unit, and a transmission unit transmitting the packet temporarily stored in the plurality of queues and the packet saved in the saved packet holding unit to a processing unit that processes a packet.

    SYSTEMS AND METHODS FOR EFFICIENTLY STORING A DISTRIBUTED LEDGER OF RECORDS

    公开(公告)号:US20210036970A1

    公开(公告)日:2021-02-04

    申请号:US17075495

    申请日:2020-10-20

    摘要: Systems and methods for efficiently storing a distributed ledger of records. In an exemplary aspect, a method may include generating a record comprising a payload and a header, wherein the payload stores a state of a data object associated with a distributed ledger and the header stores a reference to state information in the payload. The method may further comprise including the record in a trunk filament comprising a first plurality of records indicative of historic states of the data object, wherein the trunk filament is part of a first lifeline. The method may include identifying a jet of the distributed ledger, wherein the jet is a logical structure storing a second lifeline with a second plurality of records. In response to determining that the first plurality of records is related to the second plurality of records, the method may include storing the first lifeline in the jet.

    Efficient scatter-gather over an uplink

    公开(公告)号:US10887252B2

    公开(公告)日:2021-01-05

    申请号:US16181376

    申请日:2018-11-06

    摘要: A network interface device is connected to a host computer by having a memory controller, and a scatter-gather offload engine linked to the memory controller. The network interface device prepares a descriptor including a plurality of specified memory locations in the host computer, incorporates the descriptor in exactly one upload packet, transmits the upload packet to the scatter-gather offload engine via the uplink, invokes the scatter-gather offload engine to perform memory access operations cooperatively with the memory controller at the specified memory locations of the descriptor, and accepts results of the memory access operations.

    Buffer assignment balancing in a network device

    公开(公告)号:US10587536B1

    公开(公告)日:2020-03-10

    申请号:US15996378

    申请日:2018-06-01

    申请人: Innovium, Inc.

    摘要: Techniques for improved handling of queues of data units are described, such as queues of buffered data units of differing types and/or sources within a switch or other network device. When the size of a queue surpasses the state entry threshold for a certain state, the queue is said to be in the certain state. While in the certain state, data units assigned to the queue may be handled differently in some respect, such as being marked or being dropped without further processing. The queue remains in this certain state until its size falls below the state release threshold for the state. The state release threshold is adjusted over time in, for example, a random or pseudo-random manner. Among other aspects, in some embodiments, this adjustment of the state release threshold addresses fairness issues that may arise with respect to the treatment of different types or sources of data units.

    Technologies for jitter-adaptive low-latency, low power data streaming between device components

    公开(公告)号:US10511509B2

    公开(公告)日:2019-12-17

    申请号:US15481708

    申请日:2017-04-07

    申请人: INTEL CORPORATION

    摘要: Technologies for low-latency data streaming include a computing device having a processor that includes a producer and a consumer. The producer generates a data item, and in a local buffer producer mode adds the data item to a local buffer, and in a remote buffer producer mode adds the data item to a remote buffer. When the local buffer is full, the producer switches to the remote buffer producer mode, and when the remote buffer is below a predetermined low threshold, the producer switches to the local buffer producer mode. The consumer reads the data item from the local buffer while operating in a local buffer consumer mode and reads the data item from the remote buffer while operating in a remote buffer consumer mode. When the local buffer is above a predetermined high threshold, the consumer may switch to a catch-up operating mode. Other embodiments are described and claimed.

    TECHNOLOGIES FOR DYNAMIC MULTI-CORE NETWORK PACKET PROCESSING DISTRIBUTION

    公开(公告)号:US20190294570A1

    公开(公告)日:2019-09-26

    申请号:US16442094

    申请日:2019-06-14

    申请人: Intel Corporation

    IPC分类号: G06F13/28 G06F9/54 H04L12/883

    摘要: Technologies for dynamic multi-core packet processing distribution include a compute device having a distributor core, a direct memory access (DMA) engine, and multiple worker cores. The distributor core writes work data to a distribution buffer. The work data is associated with a packet processing operation. The distributor core may perform a work distribution operation to generate the work data. The work data may be written to a private cache of the distributor core. The distributor core programs the DMA engine to copy the work data from the distribution buffer to a shadow buffer. The DMA engine may copy the work data from one cache line of a shared cache to another cache line of the shared cache. The worker cores access the work data in the shadow buffer. The worker cores may perform the packet processing operation with the work data. Other embodiments are described and claimed.

    Multi-processor computing systems
    30.
    发明授权

    公开(公告)号:US10397140B2

    公开(公告)日:2019-08-27

    申请号:US15546340

    申请日:2015-06-25

    摘要: A multi-processor computing system comprising a second processing device to generate outgoing data packets and comprising a second network stack to save the outgoing data packets in a second outgoing packet buffer of the second processing device. A second network driver to save an outgoing buffer pointer in a second transmission ring of the second processing device, the outgoing buffer pointer corresponding to the second outgoing packet buffer. A first processing device comprising a first network driver to move the outgoing buffer pointer from the second transmission ring to a send ring in the first processing device. A network interface controller (NIC) to obtain the outgoing buffer pointer from the send ring. The NIC to copy the outgoing data packets from the second outgoing packet buffer to a transmission queue of the NIC. The NIC to transmit the outgoing data packets to another computing system over a communication network.