Abstract:
A power supply system for CPU is disclosed. The CPU includes a plurality of dynamic voltage identification (VID) pins, and the power supply standard of the CPU conforms to a first standard. The power supply system includes a dynamic VID signal line set and a core voltage controller. The VID signal line set is coupled to the VID pins of the CPU. The core voltage controller conforms to a second standard and is coupled to a partial line set of the dynamic VID signal line set. The core voltage controller determines a core voltage to be output to the CPU according to the partial line set to conform to the first standard.
Abstract:
A control method applied to a computer system in a hybrid sleep mode is provided. The control method includes following steps: entering a first sleep mode of the computer after a system parameter is stored in a memory and a hard drive of the computer system; determining whether the computer system is resumed or not in a predetermined first period in the first sleep mode, if true, resuming the computer system by reading the system parameter from the memory; if false, entering a second sleep mode of the computer system; determining whether the computer is resumed or not in the second sleep mode; if true, resuming the computer system by reading the system parameter from the hard drive; and if false, keeping the computer system in the second sleep mode.
Abstract:
A motherboard includes a circuit board, a plurality of electronic components, a metal cover and a flexible heat-conducting component. The electronic components are disposed at the circuit board. The metal cover covers the circuit board. The flexible heat-conducting component is disposed between the circuit board and the metal cover and contacts the electronic components and the metal cover.
Abstract:
A motherboard with overclocking and overvolting functions is provided. The motherboard with an overvolting function includes a specified component, a voltage regulator and a micro-controller. The specified component receives an operating voltage. The voltage regulator generates the operating voltage according to a reference voltage. The micro-controller is electrically connected to an external input device for receiving a control signal issued by the external input device and adjusting the reference voltage according to the control signal.
Abstract:
A control method of a variable-frequency and multi-phase voltage regulator module is provided. The variable-frequency and multi-phase voltage regulator module is connected to a central processing unit and embedded on a motherboard for providing a central-processing-unit current. The control method includes steps of: detecting an intensity of a central-processing-unit current of the central processing unit; providing a power to the central processing unit via M number of phases based on a first switching frequency if the intensity of the central-processing-unit current is greater than a reference-current value; and providing a power to the central processing unit via N number of phases based on a second switching frequency if the intensity of the central-processing-unit current is less than the reference-current value.
Abstract:
A multi-phase voltage regulator module connects to a central processing unit and is able to operate in one of a high-load mode and a low-load mode. The multi-phase voltage regulator module comprises: a pulse-width-modulation controller generating a plurality of phase-width-modulation signals; and, a plurality of phase circuits, each of which receives a corresponding one of the phase-width-modulation signals and generates a corresponding output current to the central processing unit; wherein a first portion of the phase circuits are activated when the multi-phase voltage regulator module is operated in the low-load mode at a first time, and, a second portion of the phase circuits are activated when the multi-phase voltage regulator module is operated in the low-load mode at a second time, the first portion being non-identical to the second portion.
Abstract:
A quantification indicating circuit includes an indicating lamp set, a converting circuit, and an indicating lamp control circuit. The indicating lamp set has a plurality of indicating lamps. The converting circuit has a plurality of predetermined threshold values which are compared with a numerical signal of a circuit board to generate a comparison result. The comparison result is converted to be outputs of a plurality of control bits. The indicating lamp control circuit is coupled between the indicating lamp set and the converting circuit and is used for controlling the number of the indicating lamps which are brightened according to the outputs of the control bits.
Abstract:
The invention provides an outer cover adapted to a communication device, a communication device including the same and a method for manufacturing the same. The outer cover according to the invention includes a cover body and an antenna. The cover body has a bottom surface. Particularly, the antenna is fixed at a predetermined position on the bottom surface by an insert molding process.
Abstract:
A computer has a plurality of sleeping modes to be switch directly. The power supply assemblies provide a plurality of power supplies to elements in the computer. The storage module is used to store executing data corresponding to each sleeping mode. The power management module is used to set the number of the power supply assemblies which need to be switched on in each sleeping mode. The control module determines the sleeping mode which is switched to according to a received trigger event and sends a first switching signal to the storage module to make the storage module store the executing data and a second switching signal to the power management module to make the power management module set the number of the power supply assemblies and switches the sleeping mode of the computer directly.
Abstract:
An image processing method includes the following steps. First, noise of a first image is filtered, and the first image is converted to obtain a luminance signal. Second, the first image is stored and outputted. Third, a color space converting process is performed upon the first image according to the luminance signal to obtain a second image. Fourth, a linear computing is performed upon the second image to obtain a third image. Fifth, the color space converting process is performed according to a third image and the luminance signal to obtain and output a fourth image. Sixth, an error compensation is performed upon the first image and the fourth image, and the fourth image is outputted. Accordingly, a linear operating process and error compensation processing is performed upon the single image to filter the noise of the image, and thus a load of the system is reduced.