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公开(公告)号：US20150269904A1
公开(公告)日：2015-09-24
申请号：US14291016
申请日：2014-05-30
Applicant: Novatek Microelectronics Corp.
Inventor： Wan-Ching Tsai
IPC: G09G5/00
CPC classification number: G09G5/02 , G09G2320/0242 , G09G2320/0266 , G09G2320/0693 , G09G2340/04 , G09G2360/16 , G09G2370/00
Abstract: An image processing device and a method thereof are provided, and said device includes a valid bits detector and a compensator. The valid bits detector is configured to detect valid bits of an image input signal thereby outputting a correcting coefficient correspondingly. The compensator is coupled to the valid bits detector to receive the correcting coefficient, bit-compensating for the image input signal according to the correcting coefficient, thereby outputting an image output signal correspondingly.
Abstract translation: 提供了图像处理装置及其方法，并且所述装置包括有效位检测器和补偿器。 有效位检测器被配置为检测图像输入信号的有效位，从而相应地输出校正系数。 补偿器耦合到有效位检测器以接收校正系数，根据校正系数对图像输入信号进行位补偿，从而相应地输出图像输出信号。
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公开(公告)号：US20150262943A1
公开(公告)日：2015-09-17
申请号：US14726613
申请日：2015-06-01
Applicant: Novatek Microelectronics Corp.
Inventor： Jhih-Siou Cheng , Tzu-Chiang Lin , Chia-En Wu , Chun-Yung Cho , Cheng-Hung Chen , Ju-Lin Huang
IPC: H01L23/60 , H02H9/02 , H01L23/00 , H01L23/538 , H01L25/065
CPC classification number: H01L23/60 , H01L23/5389 , H01L24/17 , H01L25/0655 , H01L2224/16137 , H01L2224/16195 , H01L2924/0002 , H02H9/02 , H05K9/0067 , H01L2924/00
Abstract: A chip package structure includes a package body. The package body includes a core circuit and an electrostatic discharge protection circuit. A first connection terminal electrically is connected to the core circuit. A second connection terminal electrically is connected to the electrostatic discharge protection circuit. A first interconnection structure electrically connected to the electrostatic discharge protection circuit, the second connection terminal and a third connection terminal. A first lead electrically connects the second connection terminal and an external circuit. A second lead electrically connects the first connection terminal and the third connection terminal. The second lead and the first lead are substantially separate.
Abstract translation: 芯片封装结构包括封装体。 封装体包括核心电路和静电放电保护电路。 第一连接端子电连接到核心电路。 第二连接端子电连接到静电放电保护电路。 电连接到静电放电保护电路的第一互连结构，第二连接端子和第三连接端子。 第一引线将第二连接端子和外部电路电连接。 第二引线电连接第一连接端子和第三连接端子。 第二个领先者和第一个领先者基本上是分开的。
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公开(公告)号：US09118287B2
公开(公告)日：2015-08-25
申请号：US13970618
申请日：2013-08-20
Applicant: NOVATEK Microelectronics Corp.
Inventor： Xie-Ren Hsu , Chia-Hung Lin , Wei-Hsiang Hung
CPC classification number: H03F3/45076 , H03F1/0261 , H03F3/45632 , H03F2203/45244 , H03F2203/45248
Abstract: An adaptive amplification circuit is provided, which includes an operational amplifier comprising a variable bias current source for providing a variable bias current for the operational amplifier, an equivalent circuit of the operational amplifier for receiving an input voltage and generating an output voltage according to the input voltage, and a bias control unit for generating a bias control signal to the variable bias current source according to the output voltage so as to adjust the variable bias current.
Abstract translation: 提供一种自适应放大电路，其包括运算放大器，其包括用于为运算放大器提供可变偏置电流的可变偏置电流源，用于接收输入电压并根据输入产生输出电压的运算放大器的等效电路 电压和偏置控制单元，用于根据输出电压向可变偏置电流源产生偏置控制信号，以便调整可变偏置电流。
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公开(公告)号：US09118286B2
公开(公告)日：2015-08-25
申请号：US14083455
申请日：2013-11-19
Applicant: Novatek Microelectronics Corp.
Inventor： Shiau-Wen Kao
IPC: H03F3/45
CPC classification number: H03F3/45071 , H03F3/45183 , H03F3/45475 , H03F3/45968 , H03F2203/45396 , H03F2203/45511 , H03F2203/45522 , H03F2203/45526 , H03F2203/45528 , H03F2203/45591
Abstract: A DC offset cancellation circuit is provided. The DC offset cancellation circuit includes a first operational amplifier and a feedback gain circuit. The first operational amplifier includes a first input transconductance stage, a second input transconductance stage and an output stage. An input terminal of the first input transconductance stage receives an input signal of the first operational amplifier through a first input terminal of the first operational amplifier. An output terminal of the output stage outputs an output signal of the first operational amplifier through an output terminal of the first operational amplifier. An input terminal of the feedback gain circuit is coupled to the output terminal of the first operational amplifier, and an output terminal of the feedback gain circuit is coupled to the input terminal of the second transconductance stage through a second input terminal of the first operational amplifier.
Abstract translation: 提供DC偏移消除电路。 DC偏移消除电路包括第一运算放大器和反馈增益电路。 第一运算放大器包括第一输入跨导级，第二输入跨导级和输出级。 第一输入跨导级的输入端通过第一运算放大器的第一输入端接收第一运算放大器的输入信号。 输出级的输出端通过第一运算放大器的输出端输出第一运算放大器的输出信号。 反馈增益电路的输入端耦合到第一运算放大器的输出端，反馈增益电路的输出端通过第一运算放大器的第二输入端耦合到第二跨导级的输入端 。
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公开(公告)号：US20150235625A1
公开(公告)日：2015-08-20
申请号：US14702773
申请日：2015-05-04
Applicant: NOVATEK Microelectronics Corp.
Inventor： Ji-Ting Chen , Kuang-Feng Sung
CPC classification number: G09G5/18 , G09G3/3614 , G09G3/3685 , G09G3/3688 , G09G2330/021
Abstract: The present disclosure provides a driving device for driving a display device. The driving device includes a first charge sharing switch, a second charge sharing switch and one or more third charge sharing switches. The first charge sharing switch is coupled between two adjacent odd data channels of a plurality of data channels. The second charge sharing switch is coupled between two adjacent even data channels of the plurality of data channels. Each of the one or more third charge sharing switches is coupled between two adjacent ones of the plurality of data channels. A first charge sharing is performed when the first charge sharing switch is turned on.
Abstract translation: 本公开提供了一种用于驱动显示装置的驱动装置。 驱动装置包括第一电荷共享开关，第二电荷共享开关和一个或多个第三电荷共享开关。 第一电荷共享开关耦合在多个数据信道的两个相邻的奇数数据信道之间。 第二电荷共享开关耦合在多个数据信道的两个相邻偶数数据信道之间。 一个或多个第三电荷共享开关中的每一个耦合在多个数据信道中的两个相邻数据信道之间。 当第一电荷共享开关接通时，执行第一电荷共享。
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Patent Agency Ranking
公开(公告)号：US09112453B2
公开(公告)日：2015-08-18
申请号：US14014368
申请日：2013-08-30
Applicant: Novatek Microelectronics Corp.
Inventor： Pei-Ye Wang , Ji-Ting Chen
CPC classification number: H03F3/16 , H03F3/45183
Abstract: An operational amplifier circuit including a main circuit, a compensation capacitor, a power circuit, and a set of switches is disclosed. The main circuit has an output terminal. The compensation capacitor has a first end connected to an internal node of the main circuit and a second end connected to the output terminal of the main circuit. The power circuit provides a current or a voltage as predetermined. The set of switches connects the power circuit to the compensation capacitor. When the main circuit is not in an output state, the set of switches is switched to allow the power circuit to provide the current or voltage to the compensation capacitor. When the main circuit is in the output state, the set of switches is switched to disconnect the power circuit from the compensation capacitor and allow the main circuit to return to an output circuit state and operate normally.
Abstract translation: 公开了一种包括主电路，补偿电容器，电源电路和一组开关的运算放大器电路。 主电路有一个输出端子。 补偿电容器具有连接到主电路的内部节点的第一端和连接到主电路的输出端子的第二端。 电源电路提供预定的电流或电压。 该组开关将电源电路连接到补偿电容器。 当主电路不处于输出状态时，开关组被切换以允许电源电路向补偿电容器提供电流或电压。 当主电路处于输出状态时，切换开关组，使电源电路与补偿电容断开，使主电路返回到输出电路状态并正常工作。
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公开(公告)号：US20150228234A1
公开(公告)日：2015-08-13
申请号：US14339753
申请日：2014-07-24
Applicant: NOVATEK MICROELECTRONICS CORP.
Inventor： Chieh-An LIN , Chun-Yung CHO , Jhih-Siou CHENG
CPC classification number: G09G3/3614 , G09G3/3685 , G09G2310/027 , G09G2310/0291
Abstract: A buffer circuit, a display module, and a display driving method are disclosed. The buffer circuit comprises a positive polarity buffer, a negative polarity buffer. The positive polarity buffer receives a first supply voltage and a second supply voltage to output a positive reference voltage to a positive resistance string. The second supply voltage is less than the first supply voltage. The negative polarity buffer receives the second supply voltage and a third supply voltage to output a negative reference voltage to a negative resistance string. The third supply voltage is less than the second supply voltage.
Abstract translation: 公开了一种缓冲电路，显示模块和显示驱动方法。 缓冲电路包括正极性缓冲器，负极性缓冲器。 正极性缓冲器接收第一电源电压和第二电源电压，以将正参考电压输出到正电阻串。 第二电源电压小于第一电源电压。 负极性缓冲器接收第二电源电压和第三电源电压，以将负参考电压输出到负电阻串。 第三电源电压小于第二电源电压。
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公开(公告)号：US09059673B2
公开(公告)日：2015-06-16
申请号：US14088454
申请日：2013-11-25
Applicant: Novatek Microelectronics Corp.
Inventor： Ying-Chung Chiu
CPC classification number: H03G3/20 , H03G1/0029
Abstract: An amplifier circuit and an operation method thereof are provided. The amplifier circuit includes two stages of amplifiers. When the amplifier circuit is operated in a high gain mode, the two stages of amplifiers are operated normally to provide high gain. When the amplifier circuit is operated in a low gain mode, the second stage of amplifier is turned off, and the first stage of amplifier is coupled to output terminals of the amplifier circuit through signal isolation elements so as to form a single stage of amplifier. Therefore, the amplifier circuit can change the total gain value thereof according to a requirement of gain.
Abstract translation: 提供了一种放大器电路及其操作方法。 放大器电路包括两级放大器。 当放大器电路在高增益模式下工作时，两级放大器正常工作，以提供高增益。 当放大器电路在低增益模式下工作时，放大器的第二级关断，放大器的第一级通过信号隔离元件耦合到放大器电路的输出端，从而形成单级放大器。 因此，放大器电路可以根据增益的要求改变其总增益值。
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329.发明申请公开(公告)号：US20150163394A1
公开(公告)日：2015-06-11
申请号：US14251640
申请日：2014-04-13
Applicant: NOVATEK Microelectronics Corp.
Inventor： Shen-Fu Tsai , Wei Hsu , Min-Hui Chu , Chin-Hui Huang , Wei-Lung Liu
CPC classification number: H04N5/23212 , H04N5/2258 , H04N5/23219
Abstract: An automatic-focusing imaging capture device includes a first imaging capture module for generating a clue imaging information according to an object and a second imaging capture module for determining whether or not to re-focus for generating an imaging information corresponding to the object according to the clue imaging information; wherein a first frame rate of the first imaging capture module is higher than a second frame rate of the second imaging capture module, and the clue imaging information includes an object-distance information and a depth-of-field information.
Abstract translation: 自动对焦成像捕获装置包括：第一成像捕获模块，用于根据对象产生线索成像信息;第二成像捕获模块，用于根据所述第一成像捕获模块确定是否重新聚焦以生成与所述对象相对应的成像信息 提示成像信息; 其中所述第一成像捕获模块的第一帧速率高于所述第二成像捕获模块的第二帧速率，并且所述线索成像信息包括对象距离信息和景深信息。
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公开(公告)号：US20150161959A1
公开(公告)日：2015-06-11
申请号：US14531931
申请日：2014-11-03
Applicant: NOVATEK Microelectronics Corp.
Inventor： Chin-Hung Hsu , Yu-Ming Chang , Chao-Chih Hsiao , Po-Ching Li
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3611 , G09G2310/08
Abstract: A driving method for a display system with a gate driving device and a panel includes utilizing a plurality of gate driving modules of the gate driving device to generate a plurality of gate driving signals for driving a plurality of scan lines of the panel; and adjusting a plurality of output resistances of the plurality of gate driving modules according to the plurality of gate driving signals.
Abstract translation: 具有栅极驱动装置和面板的显示系统的驱动方法包括利用栅极驱动装置的多个栅极驱动模块产生用于驱动面板的多个扫描线的多个栅极驱动信号; 以及根据所述多个栅极驱动信号调整所述多个栅极驱动模块的多个输出电阻。
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