公开(公告)号：US20050180191A1

公开(公告)日：2005-08-18

申请号：US11102998

申请日：2005-04-11

Applicant: Daniel Xu

Inventor： Daniel Xu

IPC: H01L45/00 ,  G11C11/22

CPC classification number: H01L45/06 ,  G11C2213/52 ,  G11C2213/72 ,  H01L27/2409 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1273 ,  H01L45/144 ,  H01L45/16

Abstract: A phase-change memory may have a tapered lower electrode coated with an insulator. The coated, tapered electrode acts as a mask for a self-aligned trench etch to electrically separate adjacent wordlines. In some embodiments, the tapered lower electrode may be formed over a plurality of doped regions, and isotropic etching may be used to taper the electrode as well as part of the underlying doped regions.

公开(公告)号：US20050136557A1

公开(公告)日：2005-06-23

申请号：US11038336

申请日：2005-01-19

Applicant: Daniel Xu ,  Chien Chiang

Inventor： Daniel Xu ,  Chien Chiang

IPC: H01L45/00 ,  H01L21/00

CPC classification number: H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1683

Abstract: A memory cell may include a phase-change material. Adhesion between the phase-change material and a dielectric or other substrate may be enhanced by using an adhesion enhancing interfacial layer. Conduction past the phase-change material through the interfacial layer may be reduced by providing a discontinuity or other feature that reduces or prevents conduction along said interfacial layer.

Abstract translation: 存储单元可以包括相变材料。 可以通过使用粘合增强界面层来增强相变材料与电介质或其它基底之间的粘附。 可以通过提供减少或阻止沿着所述界面层传导的不连续性或其它特征来减少穿过相变材料通过界面层的传导。

公开(公告)号：US06861267B2

公开(公告)日：2005-03-01

申请号：US09953833

申请日：2001-09-17

Applicant: Daniel Xu ,  Chien Chiang

Inventor： Daniel Xu ,  Chien Chiang

IPC: H01L45/00 ,  H01L21/00

CPC classification number: H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1683

Abstract: A memory cell may include a phase-change material. Adhesion between the phase-change material and a dielectric or other substrate may be enhanced by using an adhesion enhancing interfacial layer. Conduction past the phase-change material through the interfacial layer may be reduced by providing a discontinuity or other feature that reduces or prevents conduction along said interfacial layer.

公开(公告)号：US06642102B2

公开(公告)日：2003-11-04

申请号：US09896530

申请日：2001-06-30

Applicant: Daniel Xu

Inventor： Daniel Xu

IPC: H01L21336

CPC classification number: H01L21/76897 ,  H01L23/525 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/16 ,  H01L45/1675 ,  H01L2924/0002 ,  Y10S438/90 ,  H01L2924/00

Abstract: A method comprising forming as stacked materials on a substrate, a volume of programmable material and a signal line, conformably forming a first dielectric material on the stacked materials, forming a second dielectric material on the first material, etching an opening in the second dielectric material with an etchant that, between the first dielectric material and the second dielectric material, favors removal of the second dielectric material, and forming a contact in the opening to the stacked materials. An apparatus comprising a contact point formed on a substrate, a volume of programmable material formed on the contact point, a signal line formed on the volume of programmable material, a first dielectric material conformally formed on the signal line, a different second dielectric material formed on the first dielectric material, and a contact formed through the first dielectric material and the second dielectric material to the signal line.

Abstract translation: 一种方法，包括在衬底上形成堆叠的材料，一定量的可编程材料和信号线，在所述堆叠材料上顺应地形成第一电介质材料，在所述第一材料上形成第二电介质材料，蚀刻所述第二电介质材料 在第一电介质材料和第二电介质材料之间，蚀刻剂有利于去除第二电介质材料，并且在开口中形成与层叠材料的接触。 一种设备，包括形成在基板上的接触点，形成在接触点上的可编程材料的体积，形成在可编程材料体积上的信号线，在信号线上共形形成的第一电介质材料，形成的不同的第二电介质材料 在第一电介质材料上，以及通过第一介电材料和第二介电材料形成的接触到信号线的接触。

公开(公告)号：US06404665B1

公开(公告)日：2002-06-11

申请号：US09675803

申请日：2000-09-29

Applicant: Tyler A. Lowrey ,  Daniel Xu ,  Chien Chiang ,  Patrick J. Neschleba

Inventor： Tyler A. Lowrey ,  Daniel Xu ,  Chien Chiang ,  Patrick J. Neschleba

IPC: G11C1100

CPC classification number: H01L29/685 ,  G11C13/0004 ,  G11C2213/72 ,  H01L27/101 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16

Abstract: An apparatus comprising a volume of memory material and a pair of spacedly disposed conductors. An electrode coupled to the volume of memory material and disposed between the volume of memory material and one conductor comprises a first material having a first resistivity value and a second material having a different second resistivity value formed by exposing the first material to a gaseous ambient.