公开(公告)号：US07648909B2

公开(公告)日：2010-01-19

申请号：US11321533

申请日：2005-12-30

申请人： Hae-Jung Lee ,  Sang-Hoon Cho ,  Suk-Ki Kim

发明人： Hae-Jung Lee ,  Sang-Hoon Cho ,  Suk-Ki Kim

IPC分类号： H01L21/4763

CPC分类号： H01L21/76877 ,  H01L21/32115 ,  H01L21/32136 ,  H01L21/76843 ,  H01L21/76849

摘要： A method for fabricating a semiconductor device includes forming an inter-layer insulation layer on a substrate; forming openings in the inter-layer insulation layer; forming a metal barrier layer in the openings and on the inter-layer insulation layer; forming a first conductive layer on the metal barrier layer and filled in the openings; etching the first conductive layer to form interconnection layers in the openings and to expose portions of the metal barrier layer, the interconnection layers being inside the openings and at a depth from a top of the openings; etching the exposed portions of the metal barrier layer to obtain a sloped profile of the metal barrier layer at top lateral portions of the openings; forming a second conductive layer over the inter-layer insulation layer, the interconnection layers and the metal barrier layer with the sloped profile; and patterning the second conductive layer to form metal lines.

摘要翻译： 一种制造半导体器件的方法包括在衬底上形成层间绝缘层; 在层间绝缘层中形成开口; 在开口和层间绝缘层上形成金属阻挡层; 在所述金属阻挡层上形成第一导电层并填充在所述开口中; 蚀刻所述第一导电层以在所述开口中形成互连层并且暴露所述金属阻挡层的部分，所述互连层位于所述开口内部以及在距所述开口顶部的深度处; 蚀刻金属阻挡层的暴露部分以在开口的顶侧部分处获得金属阻挡层的倾斜轮廓; 在所述层间绝缘层上形成第二导电层，所述互连层和所述金属阻挡层具有所述倾斜轮廓; 并且图案化第二导电层以形成金属线。

公开(公告)号：US07575981B2

公开(公告)日：2009-08-18

申请号：US12004240

申请日：2007-12-18

申请人： Hae-Jung Lee ,  Hyun-Sik Park ,  Jae-Kyun Lee

发明人： Hae-Jung Lee ,  Hyun-Sik Park ,  Jae-Kyun Lee

IPC分类号： H01L21/76

CPC分类号： H01L21/76232

摘要： A method for fabricating an isolation layer in a semiconductor device includes providing a substrate, forming a trench over the substrate, forming a liner nitride layer and a liner oxide layer along a surface of the trench, forming an insulation layer having an etch selectivity ratio different from that of the liner oxide layer over the liner oxide layer, forming a spin on dielectric (SOD) oxide layer to fill a portion of the trench over the insulation layer, and forming a high density plasma (HDP) oxide layer for filling the remaining a portion of the trench.

摘要翻译： 在半导体器件中制造隔离层的方法包括：提供衬底，在衬底上形成沟槽，沿着沟槽的表面形成衬里氮化物层和衬垫氧化物层，形成具有不同蚀刻选择比的绝缘层 与衬垫氧化物层上的衬垫氧化物层的衬垫氧化物层的形成自旋在电介质（SOD）氧化物层上形成，以填充绝缘层上的一部分沟槽，并形成高密度等离子体（HDP）氧化物层，用于填充剩余的 一部分沟槽。

公开(公告)号：US20080220543A1

公开(公告)日：2008-09-11

申请号：US12004179

申请日：2007-12-20

申请人： Hyun-Sik Park ,  Hae-Jung Lee ,  Jae-Kyun Lee

发明人： Hyun-Sik Park ,  Hae-Jung Lee ,  Jae-Kyun Lee

IPC分类号： H01L21/02

CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating a semiconductor device includes forming a fuse over a substrate, the fuse having a barrier layer, a metal layer, and an anti-reflective layer stacked, selectively removing the anti-reflective layer, forming an insulation layer over a whole surface of the resultant structure including the fuse, and performing repair-etching such that part of the insulation layer remains above the fuse.

摘要翻译： 一种用于制造半导体器件的方法，包括在衬底上形成熔丝，所述熔丝具有阻挡层，金属层和抗反射层，层叠，选择性地去除抗反射层，在整个表面上形成绝缘层 包括保险丝的所得结构，并执行修补蚀刻，使得绝缘层的一部分保留在保险丝上方。

公开(公告)号：US20080160742A1

公开(公告)日：2008-07-03

申请号：US11963989

申请日：2007-12-24

申请人： Yong-Tae CHO ,  Hae-Jung LEE

发明人： Yong-Tae CHO ,  Hae-Jung LEE

IPC分类号： H01L21/3205

CPC分类号： H01L29/66621 ,  H01L29/1037 ,  H01L29/42376 ,  H01L29/66553

摘要： A method for fabricating a semiconductor device having a recess gate includes forming a first recess pattern by etching the substrate and a sidewall protection layer on sidewalls of the first recess pattern, forming a second recess pattern having a greater width than the first recess pattern by etching a certain portion of the substrate below a bottom portion of the first recess pattern, and forming a gate electrode filling the first and the second recess patterns.

摘要翻译： 一种制造具有凹陷栅的半导体器件的方法包括：通过在第一凹槽图案的侧壁上蚀刻衬底和侧壁保护层来形成第一凹槽图案，通过蚀刻形成宽度大于第一凹槽图案的第二凹槽图案 所述基板的位于所述第一凹部图案的底部下方的一部分，以及形成填充所述第一凹部图案和所述第二凹部图案的栅电极。

公开(公告)号：US20080003811A1

公开(公告)日：2008-01-03

申请号：US11761577

申请日：2007-06-12

申请人： Hae-Jung Lee ,  Ik-Soo Choi ,  Chang-Youn Hwang ,  Mi-Hyune You

发明人： Hae-Jung Lee ,  Ik-Soo Choi ,  Chang-Youn Hwang ,  Mi-Hyune You

IPC分类号： H01L21/4763

CPC分类号： H01L21/76897 ,  H01L21/76804 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10855 ,  Y10S257/906 ,  Y10S257/912

摘要： A method for fabricating a storage node contact in a semiconductor device includes forming a landing plug over a substrate, forming a first insulation layer over the landing plug, forming a bit line pattern over the first insulation layer, forming a second insulation layer over the bit line pattern, forming a mask pattern for forming a storage node contact over the second insulation layer, etching the second and first insulation layers until the landing plug is exposed to form a storage node contact hole including a portion having a rounded profile, filling a conductive material in the storage node contact hole to form a contact plug, and forming a storage node over the contact plug.

摘要翻译： 一种用于在半导体器件中制造存储节点接触的方法包括在衬底上形成着陆塞，在着陆塞上形成第一绝缘层，在第一绝缘层上形成位线图形，在该位上形成第二绝缘层 形成用于在所述第二绝缘层上形成存储节点接触的掩模图案，蚀刻所述第二绝缘层和所述第一绝缘层，直到所述着陆塞被暴露以形成包括具有圆形轮廓的部分的存储节点接触孔，填充导电 存储节点接触孔中的材料形成接触塞，并在接触插塞上形成存储节点。

公开(公告)号：US20070004194A1

公开(公告)日：2007-01-04

申请号：US11321593

申请日：2005-12-30

申请人： Yong-Tae Cho ,  Hae-Jung Lee ,  Sang-Hoon Cho

发明人： Yong-Tae Cho ,  Hae-Jung Lee ,  Sang-Hoon Cho

IPC分类号： H01L21/4763

CPC分类号： H01L27/10852 ,  H01L21/76802 ,  H01L21/76844

摘要： A method for fabricating a semiconductor device with a deep opening is provided. The method includes: forming an insulation layer on a substrate; selectively etching the insulation layer to form first openings; enlarging areas of the first openings; forming anti-bowing spacers on sidewalls of the enlarged first openings; and etching portions of the insulation layer remaining beneath the enlarged first openings to form second openings.

摘要翻译： 提供一种制造具有深开口的半导体器件的方法。 该方法包括：在基板上形成绝缘层; 选择性地蚀刻绝缘层以形成第一开口; 扩大开放区域; 在扩大的第一开口的侧壁上形成抗弓形间隔物; 以及蚀刻保留在扩大的第一开口下方的部分以形成第二开口。

公开(公告)号：US20060246708A1

公开(公告)日：2006-11-02

申请号：US11321533

申请日：2005-12-30

申请人： Hae-Jung Lee ,  Sang-Hoon Cho ,  Suk-Ki Kim

发明人： Hae-Jung Lee ,  Sang-Hoon Cho ,  Suk-Ki Kim

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/76877 ,  H01L21/32115 ,  H01L21/32136 ,  H01L21/76843 ,  H01L21/76849

摘要： A method for fabricating a semiconductor device includes forming an inter-layer insulation layer on a substrate; forming openings in the inter-layer insulation layer; forming a metal barrier layer in the openings and on the inter-layer insulation layer; forming a first conductive layer on the metal barrier layer and filled in the openings; etching the first conductive layer to form interconnection layers in the openings and to expose portions of the metal barrier layer, the interconnection layers being inside the openings and at a depth from a top of the openings; etching the exposed portions of the metal barrier layer to obtain a sloped profile of the metal barrier layer at top lateral portions of the openings; forming a second conductive layer over the inter-layer insulation layer, the interconnection layers and the metal barrier layer with the sloped profile; and patterning the second conductive layer to form metal lines.

摘要翻译： 一种制造半导体器件的方法包括在衬底上形成层间绝缘层; 在层间绝缘层中形成开口; 在开口和层间绝缘层上形成金属阻挡层; 在所述金属阻挡层上形成第一导电层并填充在所述开口中; 蚀刻所述第一导电层以在所述开口中形成互连层并且暴露所述金属阻挡层的部分，所述互连层位于所述开口内部以及在距所述开口顶部的深度处; 蚀刻金属阻挡层的暴露部分以在开口的顶侧部分处获得金属阻挡层的倾斜轮廓; 在所述层间绝缘层上形成第二导电层，所述互连层和所述金属阻挡层具有所述倾斜轮廓; 并且图案化第二导电层以形成金属线。

公开(公告)号：US20060171057A1

公开(公告)日：2006-08-03

申请号：US11344161

申请日：2006-02-01

申请人： Hae-jung Lee

发明人： Hae-jung Lee

IPC分类号： G11B15/18

CPC分类号： G11B20/18 ,  G11B20/1883 ,  G11B2220/20

摘要： A reassigning method, medium, and apparatus for processing latent defects of a hard disc drive (HDD). The method of processing defects in an HDD may includes detecting latent defects that may develop into irrecoverable defects in the future, registering the detected latent defects in a temporary list, and replacing the latent defects registered in the temporary list by normal sectors when the HDD is in an idle state. Accordingly, performance and reliability of HDDs can be improved by such detecting of latent and reassigning the latent defects before they develop into actual defects.

摘要翻译： 用于处理硬盘驱动器（HDD）的潜在缺陷的重新分配方法，介质和装置。 处理HDD中的缺陷的方法可以包括检测未来可能发展成不可恢复的缺陷的潜在缺陷，将检测到的潜在缺陷登记在临时列表中，以及当HDD为HDD时，通过正常扇区替换登记在临时列表中的潜在缺陷 处于空闲状态。 因此，通过潜在的潜在检测和将潜在缺陷发展成实际缺陷之前重新分配，可以提高HDD的性能和可靠性。

公开(公告)号：US09825047B2

公开(公告)日：2017-11-21

申请号：US13587612

申请日：2012-08-16

申请人： Sung Yoon Cho ,  Hae Jung Lee ,  Byung Soo Park ,  Eun Mi Kim

发明人： Sung Yoon Cho ,  Hae Jung Lee ,  Byung Soo Park ,  Eun Mi Kim

IPC分类号： H01L23/52 ,  H01L27/11526 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582

CPC分类号： H01L27/11526 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582

摘要： A non-volatile memory device according to an aspect of the present disclosure includes a substrate, a plurality of word lines stacked over the substrate and having a stepwise pattern, wherein the plurality of word lines each have a pad region, and a plurality of contact plugs coupled to the respective pad regions of the word lines, wherein a width of a pad region of a first one of the plurality of word lines is greater than a width of a pad region of a second word line lower than the first word line.

公开(公告)号：US08604561B2

公开(公告)日：2013-12-10

申请号：US13184272

申请日：2011-07-15

申请人： Yong-Tae Cho ,  Hae-Jung Lee ,  Eun-Mi Kim ,  Kyeong-Hyo Lee

发明人： Yong-Tae Cho ,  Hae-Jung Lee ,  Eun-Mi Kim ,  Kyeong-Hyo Lee

IPC分类号： H01L29/78

CPC分类号： H01L29/66795 ,  H01L29/7851

摘要： In a semiconductor device and related method of fabricating the same, a hard mask layer is formed over a substrate, portions of the hard mask layer and the substrate are etched to form trenches having protruding portions at sidewalls, and an insulation layer buried in the trenches is formed to form device isolation regions having protruding portions at sidewalls, wherein the device isolation regions decrease a portion of a width of active regions.