公开(公告)号：US07428653B2

公开(公告)日：2008-09-23

申请号：US11185926

申请日：2005-07-20

申请人： Duncan M. Fisher ,  Keith Bindloss ,  Ching Long Su ,  Marty T. Budrovic ,  Rajiv Gupta

发明人： Duncan M. Fisher ,  Keith Bindloss ,  Ching Long Su ,  Marty T. Budrovic ,  Rajiv Gupta

IPC分类号： G06F1/12 ,  G06F1/04

CPC分类号： G06F9/3851

摘要： An alternate multi-thread pipeline structure and method are provided. A deep pipeline is provided in which two threads of two separate pipeline stages are alternatively presented to the various logic and latch circuits for execution. The execution and latching of the threads alternates from one thread to the other within a single clock cycle. Thus, each thread is executed once per clock cycle and two threads are executed in a single clock cycle.

摘要翻译： 提供了一种替代的多线程流水线结构和方法。 提供了一个深管线，其中两个独立流水线级的两个线程交替地呈现给各种逻辑和锁存电路以供执行。 线程的执行和锁存在单个时钟周期内从一个线程交替到另一个线程。 因此，每个时钟周期执行一个线程，并在一个时钟周期内执行两个线程。

公开(公告)号：US07367334B2

公开(公告)日：2008-05-06

申请号：US10648282

申请日：2003-08-27

申请人： Gene G. Faison, Jr. ,  Rajiv Gupta ,  Douglas D. McRae ,  Walter A. Nichols

发明人： Gene G. Faison, Jr. ,  Rajiv Gupta ,  Douglas D. McRae ,  Walter A. Nichols

IPC分类号： A61M11/00

CPC分类号： A61M11/041 ,  A61M11/007 ,  A61M11/042 ,  A61M15/025

摘要： A fluid vaporizing device useful for vaporizing fluid into an aerosol includes a capillary tube made from an electrically conductive material, an upstream electrode connected to the capillary tube, and a downstream electrode connected to the tube and provided with an electrical resistivity sufficient to cause heating of the downstream electrode during operation. According to various manufacturing techniques (a) the downstream electrode can be made of a material having a resistivity that is approximately constant over a desired temperature range, (b) the ratio of the resistance of the downstream electrode to the resistance of the capillary tube can be selected as a function of a preset liquid flow rate through the capillary tube, (c) the tuning range over which a desired quality aerosol can be produced can be selected to compensate for dimensional tolerances during mass production, and (d) the total hot resistance of the downstream electrode and capillary tube can be adjusted to control the location of a meniscus of a liquid vaporized in the capillary tube to produce a desired quality aerosol.

摘要翻译： 用于将流体蒸发成气溶胶的流体蒸发装置包括由导电材料制成的毛细管，连接到毛细管的上游电极和连接到管的下游电极，并且具有足以引起 操作期间的下游电极。 根据各种制造技术（a），下游电极可以由在所需温度范围内电阻率近似恒定的材料制成，（b）下游电极的电阻与毛细管的电阻的比率可以 作为通过毛细管的预设液体流速的函数来选择，（c）可以选择可以产生期望质量气溶胶的调谐范围以补偿大量生产期间的尺寸公差，以及（d）总热量 可以调节下游电极和毛细管的电阻以控制在毛细管中蒸发的液体的弯液面的位置以产生期望的质量气溶胶。

公开(公告)号：US06923179B2

公开(公告)日：2005-08-02

申请号：US10654980

申请日：2003-09-05

申请人： Rajiv Gupta ,  Douglas D. McRae ,  Kenneth A. Cox ,  Walter A. Nichols

发明人： Rajiv Gupta ,  Douglas D. McRae ,  Kenneth A. Cox ,  Walter A. Nichols

IPC分类号： A61M11/00 ,  A61M11/04 ,  A61M15/00 ,  B05B1/24 ,  B05B7/00 ,  A61M16/00 ,  H05B3/00

CPC分类号： B05B1/24 ,  A61M11/002 ,  A61M11/041 ,  A61M11/042 ,  A61M15/00 ,  A61M2205/50 ,  B05B7/0012

摘要： An aerosol generating device includes a housing, a heater and an optional mouthpiece. The heater volatilizes liquid within a flow passage and forms an aerosol in the mouthpiece. An aerosol confinement sleeve is disposed to control the size distribution of the aerosol.

公开(公告)号：US20050045179A1

公开(公告)日：2005-03-03

申请号：US10648282

申请日：2003-08-27

申请人： Gene Faison ,  Rajiv Gupta ,  Douglas McRae ,  Walter Nichols

发明人： Gene Faison ,  Rajiv Gupta ,  Douglas McRae ,  Walter Nichols

IPC分类号： A61M11/04 ,  A61M15/00 ,  A61M16/10

CPC分类号： A61M11/041 ,  A61M11/007 ,  A61M11/042 ,  A61M15/025

摘要： A fluid vaporizing device useful for vaporizing fluid into an aerosol includes a capillary tube made from an electrically conductive material, an upstream electrode connected to the capillary tube, and a downstream electrode connected to the tube and provided with an electrical resistivity sufficient to cause heating of the downstream electrode during operation. According to various manufacturing techniques (a) the downstream electrode can be made of a material having a resistivity that is approximately constant over a desired temperature range, (b) the ratio of the resistance of the downstream electrode to the resistance of the capillary tube can be selected as a function of a preset liquid flow rate through the capillary tube, (c) the tuning range over which a desired quality aerosol can be produced can be selected to compensate for dimensional tolerances during mass production, and (d) the total hot resistance of the downstream electrode and capillary tube can be adjusted to control the location of a meniscus of a liquid vaporized in the capillary tube to produce a desired quality aerosol.

摘要翻译： 用于将流体蒸发成气溶胶的流体蒸发装置包括由导电材料制成的毛细管，连接到毛细管的上游电极和连接到管的下游电极，并且具有足以引起 操作期间的下游电极。 根据各种制造技术（a），下游电极可以由在所需温度范围内电阻率近似恒定的材料制成，（b）下游电极的电阻与毛细管的电阻的比率可以 作为通过毛细管的预设液体流速的函数来选择，（c）可以选择可以产生期望质量气溶胶的调谐范围以补偿大量生产期间的尺寸公差，以及（d）总热量 可以调节下游电极和毛细管的电阻以控制在毛细管中蒸发的液体的弯液面的位置以产生期望的质量气溶胶。

公开(公告)号：US06848100B1

公开(公告)日：2005-01-25

申请号：US09541399

申请日：2000-03-31

申请人： Youfeng Wu ,  Ali Adl-Tabatabai ,  David A. Berson ,  Jesse Fang ,  Rajiv Gupta

发明人： Youfeng Wu ,  Ali Adl-Tabatabai ,  David A. Berson ,  Jesse Fang ,  Rajiv Gupta

IPC分类号： G06F9/45 ,  G06F11/36

CPC分类号： G06F11/3612

摘要： A hierarchical software profiling mechanism that gathers hierarchical path profile information has been described. Software to be profiled is instrumented with instructions that save an outer path sum when an inner region is entered, and restore the outer path sum when the inner region is exited. When the inner region is being executed, an inner path sum is generated and a profile indicator representing the inner path traversed is updated prior to the outer path sum being restored. The software to be profiled is instrumented using information from augmented control flow graphs that represent the software.

摘要翻译： 已经描述了收集分层路径简档信息的分层软件分析机制。 要进行分析的软件使用在输入内部区域时保存外部路径总和的指令进行测试，并且当内部区域退出时恢复外部路径和。 当正在执行内部区域时，生成内部路径和，并且在外部路径和恢复之前更新表示所遍历的内部路径的轮廓指示符。 要分析的软件使用来自表示软件的增强控制流程图的信息进行仪器化。

公开(公告)号：US06381676B2

公开(公告)日：2002-04-30

申请号：US09732491

申请日：2000-12-07

申请人： Robert Aglietti ,  Rajiv Gupta

发明人： Robert Aglietti ,  Rajiv Gupta

IPC分类号： G06F1200

CPC分类号： G06F12/0842 ,  G06F12/0864 ,  G06F12/0895 ,  G06F12/128

摘要： A method and apparatus which provides a cache management policy for use with a cache memory for a multi-threaded processor. The cache memory is partitioned among a set of threads of the multi-threaded processor. When a cache miss occurs, a replacement line is selected in a partition of the cache memory which is allocated to the particular thread from which the access causing the cache miss originated, thereby preventing pollution to partitions belonging to other threads.

摘要翻译： 一种提供与多线程处理器的高速缓冲存储器一起使用的高速缓存管理策略的方法和装置。 高速缓冲存储器在多线程处理器的一组线程之间分区。 当发生高速缓存未命中时，在分配给导致高速缓存未命中的访问的特定线程的高速缓冲存储器的分区中选择替换行，从而防止对属于其他线程的分区的污染。

公开(公告)号：US06321328B1

公开(公告)日：2001-11-20

申请号：US09274166

申请日：1999-03-22

申请人： Alan H. Karp ,  Rajiv Gupta

发明人： Alan H. Karp ,  Rajiv Gupta

IPC分类号： G06F1200

CPC分类号： G06F9/30043 ,  G06F9/3834 ,  G06F9/3842 ,  G06F12/0862

摘要： Computer apparatus includes an execution unit for executing a sequence of instructions which may include a speculative load instruction, a memory for storing data required by the instructions for execution, a low latency data cache for holding data accessed in the memory in response to the instructions, a low latency data buffer for holding speculative data accessed in the memory in response to the speculative load instruction, and a controller. The controller loads the speculative data from the memory into the data buffer in response to the speculative load instruction when the speculative data is not present in the data cache or the data buffer, and loads the speculative data from the data buffer into the execution unit. The speculative data may be loaded from the data buffer into the execution unit when the speculative load instruction is executed or when the speculative load instruction is committed. The speculative data is supplied to the execution unit with low latency and without contamination of the data cache.

摘要翻译： 计算机装置包括用于执行指令序列的执行单元，该指令序列可以包括推测性加载指令，用于存储执行指令所需的数据的存储器，用于响应于指令保存存储在存储器中的数据的低等待时间数据高速缓存， 低延迟数据缓冲器，用于保持响应于推测加载指令在存储器中访问的推测数据，以及控制器。 当推测数据不存在于数据高速缓存或数据缓冲器中时，控制器响应于推测加载指令将推测数据从存储器加载到数据缓冲器中，并将推测数据从数据缓冲器加载到执行单元中。 当推测加载指令执行时或推测加载指令被提交时，推测数据可以从数据缓冲器加载到执行单元中。 推测数据以低延迟提供给执行单元，而不会污染数据高速缓存。

公开(公告)号：US06272520B1

公开(公告)日：2001-08-07

申请号：US09001545

申请日：1997-12-31

申请人： Harshvardhan Sharangpani ,  Rajiv Gupta ,  Judge K. Arora

发明人： Harshvardhan Sharangpani ,  Rajiv Gupta ,  Judge K. Arora

IPC分类号： G06F900

CPC分类号： G06F9/3851 ,  G06F9/3824 ,  G06F9/3838

摘要： A method for detecting thread switch conditions provides first and second scoreboard bits for each register in a register file. The first scoreboard bit associated with a register is set when a load is generated to return data to the register. The second scoreboard bit is set if the load misses in a selected processor cache. Register read instructions are monitored, and a thread switch condition is indicated when a register read instruction to the register is detected while its first and second scoreboard bits are set.

摘要翻译： 用于检测线程切换条件的方法为寄存器文件中的每个寄存器提供第一和第二记分板位。 当产生负载以将数据返回到寄存器时，与寄存器相关联的第一记分板位置1。 如果所选处理器高速缓存中的加载丢失，则第二个记分板位置1。 监视寄存器读取指令，当在其第一和第二记分板位被置位时检测到寄存器的寄存器读取指令时指示线程切换条件。

公开(公告)号：US06205466B1

公开(公告)日：2001-03-20

申请号：US09118248

申请日：1998-07-17

申请人： Alan H. Karp ,  Rajiv Gupta ,  Arindam Banerji ,  Ernest Mak ,  Sandeep Kumar ,  Guillermo Rozas ,  Chia-Chiang Chao ,  Venkatesh Krishnan ,  Alexandre Bronstein

发明人： Alan H. Karp ,  Rajiv Gupta ,  Arindam Banerji ,  Ernest Mak ,  Sandeep Kumar ,  Guillermo Rozas ,  Chia-Chiang Chao ,  Venkatesh Krishnan ,  Alexandre Bronstein

IPC分类号： G06F900

CPC分类号： G06F9/468 ,  G06F21/6218 ,  G06F21/6236 ,  G06F2221/2141 ,  G06Q10/10 ,  Y10S707/99931 ,  Y10S707/99932

摘要： A software infrastructure for providing an open digital services marketplace including a naming manager that enables a requesting task to refer to a desired resource using a name which is local to the requesting task and a router that forwards the request to an appropriate handler for the desired resource and that enables at least one additional task to be invoked in response to the request. The infrastructure includes a permission manager that compares a set of access rights of the requesting task to the desired resource to a set of permissions associated with the desired resource such that the access rights are kept separately from the reference to the desired resource. The desired resource, the requesting task, the additional task, and a set of additional components used to handle the request are each modeled as a resource defined by a corresponding set of meta-data which includes a set of attributes and a reference to a grammar for interpreting the attributes.

摘要翻译： 一种用于提供开放数字服务市场的软件基础设施，包括命名管理器，其允许请求任务使用请求任务本地的名称引用期望的资源，以及将请求转发到所需资源的适当处理程序的路由器 并且这使得能够响应于该请求调用至少一个附加任务。 基础设施包括权限管理器，其将请求任务的一组访问权限与期望的资源进行比较，以与所需资源相关联的一组权限进行比较，使得访问权限与对期望的资源的引用分开地保持。 所需资源，请求任务，附加任务和用于处理请求的一组附加组件各自被建模为由对应的一组元数据定义的资源，该元数据包括一组属性和对语法的引用 用于解释属性。

公开(公告)号：US5941983A

公开(公告)日：1999-08-24

申请号：US881244

申请日：1997-06-24

申请人： Rajiv Gupta ,  William S. Worley, Jr.

发明人： Rajiv Gupta ,  William S. Worley, Jr.

IPC分类号： G06F9/38

CPC分类号： G06F9/3851 ,  G06F9/3836 ,  G06F9/3838 ,  G06F9/3869 ,  G06F9/3885

摘要： A method for executing instructions out-of-order to improve performance of a processor includes compiling the instructions of a program into separate queues along with encoded dependencies between instructions in the different queues. The processor then issues instructions from each of these queues independently, except that it enforces the encoded dependencies among instructions from different queues. If an instruction is dependent on instructions in other queues, the processor waits to issue it until the instructions on which it depends are issued. The processor includes a stall unit, comprised of a number of instruction counters for each queue, that enforces the dependencies between instructions in different queues.

摘要翻译： 用于执行无序的指令以改善处理器的性能的方法包括将程序的指令与不同队列中的指令之间的编码的依赖关系一起编译成单独的队列。 然后处理器独立地从每个这些队列发出指令，除了它强制来自不同队列的指令之间的编码依赖性。 如果指令依赖于其他队列中的指令，则处理器等待发出，直到发出依赖于其的指令。 该处理器包括一个停顿单元，包括用于每个队列的多个指令计数器，其强制在不同队列中的指令之间的依赖性。