公开(公告)号：US20250013739A1

公开(公告)日：2025-01-09

申请号：US18737583

申请日：2024-06-07

Applicant: STMicroelectronics International N.V.

Inventor： Luca Di Cosmo

IPC: G06F21/53 ,  G06F21/54 ,  G06F21/60

Abstract: Described is a method for performing the execution of an application in a Secure Element (SE), comprising a host sending an APDU command to the SE comprising the application, processing at the SE the APDU command for execution by the application, performing a determined plurality of operations of the application commanded by the APDU command, the application determining among the plurality of application operations commanded by the APDU command a first set of operations to be executed by the application upon receiving the APDU command and at least a second set of operations. The SE performs the first set of operations to be executed by the application upon receiving the APDU command, performing a deferred execution of a second set of operations upon communication of completion of the execution of the first set of operations from the SE to the host.

公开(公告)号：US20250013257A1

公开(公告)日：2025-01-09

申请号：US18750152

申请日：2024-06-21

Applicant: STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Atul DWIVEDI

IPC: G05F3/30 ,  G01K7/01 ,  G01K7/16

Abstract: An integrated circuit comprises a current source, a plurality of transistors arranged in parallel, a plurality of resistors, a plurality of switches, switch control circuitry, and measurement circuitry. Each resistor is coupled with the emitter of a respective transistor. Each switch selectively couples the current source to a respective resistor such that a bias current flows from the current source to the emitter of a respective transistor when a respective switch is closed. The measurement circuitry is coupled to the first transistor between its emitter and a respective resistor. The measurement circuitry is configured to separately measure a base-emitter voltage (VBE1) of the first transistor when all of the switches are closed and a base-emitter voltage (VBE2) of the first transistor when only the switch associated with the first transistor is closed and to determine a ΔVBE by calculating a difference between VBE2 and VBE 1.

公开(公告)号：US20250012901A1

公开(公告)日：2025-01-09

申请号：US18348600

申请日：2023-07-07

Applicant: STMicroelectronics International N.V.

Inventor： Andreas Assmann

IPC: G01S7/4865

Abstract: A method of operating a time-of-flight (ToF) ranging system includes: receiving a histogram that includes a cross-talk signal generated by reflected light pulses from a cover glass of the ToF ranging system; finding, in a first region of the histogram, a first rising edge having a gradient that is larger than a threshold or is a maximum gradient in the first region, where the first rising edge is in a first histogram bin having a first value; determining a second value of a second histogram bin in the first region, where the first histogram bin precedes the second histogram bin by a pre-determined distance; estimating a ratio between the first region of the histogram and a pre-stored light pulse shape based on the first value and the second value; scaling the pre-stored light pulse shape with the estimated ratio; and subtracting the scaled pre-stored light pulse shape from the histogram.

公开(公告)号：US20250008232A1

公开(公告)日：2025-01-02

申请号：US18342965

申请日：2023-06-28

Applicant: STMicroelectronics International N.V.

Inventor： Stuart McLeod ,  Andreas Assmann

IPC: H04N25/46

Abstract: A method of operating a time-of-flight (ToF) ranging system includes: transmitting, by an emitter, a light signal toward one or more targets; receiving, by a ToF sensor, the light signal reflected by the one or more targets; generating a histogram based on the received light signal; estimating gradients of histogram bins of the histogram by computing differences between adjacent histogram bins; identifying one or more pulse regions in the histogram; finding, in a pulse region, a rising edge having a gradient that is larger than a pre-determined threshold or is a maximum gradient in the pulse region, where the rising edge is a leftmost rising edge in the pulse region having the gradient; fine-tuning a location of the rising edge; and computing an estimate of a distance of a target in the pulse region by adding a pre-determined offset to a distance of the rising edge.

公开(公告)号：US20250007497A1

公开(公告)日：2025-01-02

申请号：US18750140

申请日：2024-06-21

Applicant: STMicroelectronics International N.V.

Inventor： Stephane DUCREY ,  Jean Claude BINI

IPC: H03K3/037 ,  G06F1/08 ,  H03K19/20

Abstract: An electronic circuit includes a reference clock signal generator block and functional blocks. In response to a detected failure on a signal originating from a reference frequency generator of the reference clock signal generator block, only the reference frequency generator of the reference clock signal generator block, but not the functional blocks, is reset.

公开(公告)号：US20250007430A1

公开(公告)日：2025-01-02

申请号：US18745528

申请日：2024-06-17

Applicant: STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Dietmar MENDEN ,  Christian BJOERNSEN

IPC: H02P5/68 ,  B60R16/023 ,  H02K11/215 ,  H02P7/03 ,  H02P7/29

Abstract: The present disclosure relates to a motor control device comprising: a motor driver electronic circuit configured to be electrically coupled to at least one motor and to drive the at least one motor; a control electronic circuit electrically coupled to the motor driver electronic circuit, and configured to control the motor driver electronic circuit and to be electrically coupled to a motor position sensor; wherein the control electronic circuit further comprises a CAN type transceiver configured to directly communicate with at least one main ECU, which is external to the motor control device, using a commander and responder CAN type communication protocol, the control electronic circuit being configured to act as a responder node during a communication with the main ECU.

公开(公告)号：US20250006725A1

公开(公告)日：2025-01-02

申请号：US18744291

申请日：2024-06-14

Applicant: STMicroelectronics International N.V.

Inventor： Varun KUMAR

IPC: H01L27/02 ,  H01L21/8249

Abstract: The present disclosure is directed to an input/output (I/O) interface that includes a set of complementary metal-oxide semiconductor (CMOS) transistors in a P-type substrate. A first N-type region is in the substrate and a second N-type region in the substrate spaced from the first N-type region, the second N-type region being a deep-NWELL (DNW). A first heavily doped P-type region is between the first and second N-type regions, the first heavily doped P-type region is coupled to ground. A second heavily doped P-type region in the first N-type region, the second heavily doped P-type region and is coupled to an output terminal. A first heavily doped N-type region is in the first N-type region, the first heavily doped N-type region is coupled to a floating-Well (FW) terminal. A second heavily is doped N-type region in the second N-type region. A resistor is coupled to the DNW and the resistor is coupled to a voltage supply terminal.

公开(公告)号：US20240429935A1

公开(公告)日：2024-12-26

申请号：US18742445

申请日：2024-06-13

Applicant: STMicroelectronics International N.V.

Inventor： Sandrine Ollivry ,  Jean-Francois Link

IPC: H03M1/12

Abstract: An analog-to-digital converter is clocked by a converter clock signal. A first clock signal has a frequency multiple of the frequency of the converter clock signal. A timer, which is clocked with the rhythm of the first clock signal, has a timing period multiple of the period of the converter clock signal. A processor is configured to control the converter based on the timing signal delivered by the timer, and has a first operating mode in which it is further configured to clock the timer synchronously with the converter clock signal and to deliver based on the timing signal, a periodic first conversion control signal of the converter, having a period multiple of the period of the converter clock signal and a constant first phase difference with the converter clock signal.

公开(公告)号：US20240426908A1

公开(公告)日：2024-12-26

申请号：US18742474

申请日：2024-06-13

Applicant: STMicroelectronics International N.V.

Inventor： Andrea Floridia ,  Michelangelo Massimo Maria Grosso

IPC: G01R31/3185

Abstract: A scan-testable integrated circuit includes a logic circuit configured to receive test mode control signals, a signal interface configured to receive scan-in, scan enable and scan clock signals, and produce a scan-out signal, and a scan register including a plurality of scan cells coupled to the signal interface to receive the scan enable and scan clock signals. Additional scan cells are coupled to the signal interface, and configured to receive and propagate the scan-in signal when the scan enable signal is asserted. Data retention cells are coupled to respective ones of the additional scan cells and to the logic circuit, and configured to provide as output the values stored in the respective additional scan cells to produce the test mode control signals when the scan enable signal is de-asserted, and configured to prevent the test mode control signals from changing value when the scan enable signal is asserted.

公开(公告)号：US20240426868A1

公开(公告)日：2024-12-26

申请号：US18738990

申请日：2024-06-10

Applicant: STMicroelectronics International N.V.

Inventor： Francesco RIZZINI ,  Gabriele GATTERE

IPC: G01P15/125 ,  G01P21/00

Abstract: A MEMS sensor comprising a semiconductor body and a mass elastically coupled to the semiconductor body for oscillating with respect to the semiconductor body in a oscillation direction in response to a force acting on the mass in the oscillation direction, the force being caused by an acceleration applied to the MEMS sensor. The mass and the semiconductor body define at least one measurement structure with parallel-plate electrodes, which is configured to measure capacitively a position of the mass that is indicative of the acceleration applied to the MEMS sensor. The mass and the semiconductor body further define a calibration structure with comb-finger electrodes that is electrically controllable, in a calibration mode of the MEMS sensor, to bring about electrostatically a displacement of the mass with respect to the semiconductor body in the oscillation direction.