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公开(公告)号:US12270910B2
公开(公告)日:2025-04-08
申请号:US17884273
申请日:2022-08-09
Applicant: XIAMEN UNIVERSITY , SHANGHAITECH UNIVERSITY
Inventor: Cheng Wang , Jialian Li , Lan Xu , Chenglu Wen , Jingyi Yu
Abstract: Described herein are systems and methods for training machine learning models to generate three-dimensional (3D) motions based on light detection and ranging (LiDAR) point clouds. In various embodiments, a computing system can encode a machine learning model representing an object in a scene. The computing system can train the machine learning model using a dataset comprising synchronous LiDAR point clouds captured by monocular LiDAR sensors and ground-truth three-dimensional motions obtained from IMU devices. The machine learning model can be configured to generate a three-dimensional motion of the object based on an input of a plurality of point cloud frames captured by a monocular LiDAR sensor.
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公开(公告)号:US20250092142A1
公开(公告)日:2025-03-20
申请号:US18470595
申请日:2023-09-20
Applicant: SHANGHAITECH UNIVERSITY
Inventor: Fei XU , Lu XU , Tingting WU
IPC: C07K16/28 , A61K47/68 , C07K14/725 , C12N15/85
Abstract: The present disclosure discloses a monoclonal antibody targeting FZD7, preparation method and use thereof. The monoclonal antibody targeting FZD7 comprises a heavy chain variable region and a light chain variable region, the heavy chain variable region comprises an amino acid sequence of SEQ ID NO: 1 or an amino acid sequence with at least 99% sequence identity to sequence of SEQ ID NO: 1, the light chain variable region comprises an amino acid sequence of SEQ ID NO: 2 or an amino acid sequence having at least 99% sequence identity to sequence of SEQ ID NO: 2. The monoclonal antibody targeting FZD7 obtained by the present disclosure binds to the FZD7 protein both in vitro and in vivo and has clinical development value.
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公开(公告)号:US12240909B2
公开(公告)日:2025-03-04
申请号:US17254248
申请日:2019-06-19
Inventor: Sachedv S. Sidhu , Donghui Wu , Guohua James Pan , Shusu Liu , Shane Miersch , Haiming Huang
IPC: C07K16/28
Abstract: Provided are antibodies or fragments thereof having binding specificity to anti-IL-18 receptor alpha or beta. Methods of using the antibodies or fragments thereof for treating and diagnosing diseases such as cancer and inflammatory and autoimmune diseases are also provided.
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34.
公开(公告)号:US20250064837A1
公开(公告)日:2025-02-27
申请号:US18923448
申请日:2024-10-22
Applicant: ShanghaiTech University
Inventor: Xiaobao Yang , Biao Jiang , Renhong Sun , Chaowei Ren , Ning Sun , Ying Kong , Yan Li , Jinju Chen , Qianqian Yin , Xiaoling Song , Quanju Zhao , Xing Qiu
IPC: A61K31/675 , A61K31/138 , A61K31/454 , A61K31/496 , A61K31/5025 , A61K31/506 , A61K31/519 , A61K31/5517 , A61K45/06 , A61K47/54 , A61K47/60 , A61P35/00
Abstract: The present disclosure relates to compounds of formula (I) and their anti-tumor uses, and their intermediates of formula (III), and uses of the intermediates. The compound of formula (I) has a degrading effect on a specific target protein, which is mainly composed of three parts. The first part is a small molecule compound (SMBP, Small Molecules Binding Protein) that can bind to a protein, the second part LIN is a linker, and the three-part ULM is a ubiquitin ligand (ULM, Ubiquitin Ligase Binding Moiety), wherein SMBP is covalently bound to LIN, and LIN is covalently bound to ULM. A series of compounds designed and synthesized in the present disclosure have a wide range of pharmacological activities, including the functions of degrading specific proteins and/or inhibiting activities of specific proteins, and thus can be used in related tumor treatments.
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35.
公开(公告)号:US12217475B1
公开(公告)日:2025-02-04
申请号:US18813094
申请日:2024-08-23
Applicant: SHANGHAITECH UNIVERSITY
Inventor: Qixing Zhang , Yajun Ha
Abstract: The provided is a stream processing-based non-blocking oriented FAST and rotated BRIEF (ORB) feature extraction accelerator implemented by a field programmable gate array (FPGA), which mainly includes two innovations: A stream processing-based non-blocking hardware architecture and a cache management algorithm are provided. The accelerator precisely controls and buffers each column of an rBRIEF descriptor computation window by using an algorithm, allowing to receive a new input pixel stream while computing a descriptor, thereby achieving non-blocking processing. An efficient hardware sorting design embedded in an accelerator is provided. Based on a count sorting algorithm, minimal resources are used to implement rBRIEF sorting on hardware, and the rBRIEF sorting is embedded in the accelerator. The accelerator ensures quality of a feature point while achieving high-speed feature point extraction, without significantly reducing accuracy of ORB_SLAM and other algorithms.
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公开(公告)号:US20240383913A1
公开(公告)日:2024-11-21
申请号:US18689921
申请日:2022-09-07
Applicant: CENTER FOR EXCELLENCE IN MOLECULAR CELL SCIENCE, CHINESE ACADEMY OF SCIENCES , SHANGHAITECH UNIVERSITY
Inventor: Sheng Wang , Jianjun Cheng , Luyu Fan , Huan Wang , Zhangcheng Chen , Jing Yu , Wenwen Duan , Dongmei Cao
IPC: C07D495/16 , A61K31/4985 , A61K31/55 , A61P25/24
Abstract: Disclosed in the present invention are a thiophene ring compound, a preparation method therefor and an application thereof. The structure of the thiophene ring compound of the present invention is as shown in formula I. The compound of the present invention has good affinity and agonistic activity against at least one of a dopamine receptor and a 5-hydroxytryptamine receptor.
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37.
公开(公告)号:US20240233815A9
公开(公告)日:2024-07-11
申请号:US18377840
申请日:2023-10-09
Applicant: SHANGHAITECH UNIVERSITY
Inventor: Hongtu ZHANG , Yuhao SHU , Yajun HA
IPC: G11C11/419 , G11C8/16 , G11C11/54
CPC classification number: G11C11/419 , G11C8/16 , G11C11/54
Abstract: A dual-six-transistor (D6T) in-memory computing (IMC) accelerator supporting always-linear discharge and reducing digital steps is provided. In the IMC accelerator, three effective techniques are proposed: (1) A D6T bitcell can reliably run at 0.4 V and enter a standby mode at 0.26 V, to support parallel processing of dual decoupled ports. (2) An always-linear discharge and convolution mechanism (ALDCM) not only reduces a voltage of a bit line (BL), but also keeps linear calculation throughout an entire voltage range of the BL. (3) A bypass of a bias voltage time converter (BVTC) reduces digital steps, but still keeps high energy efficiency and computing density at a low voltage. A measurement result of the IMC accelerator shows that the IMC accelerator achieves an average energy efficiency of 8918 TOPS/W (8b×8b), and an average computing density of 38.6 TOPS/mm2 (8b×8b) in a 55 nm CMOS technology.
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公开(公告)号:US12012519B2
公开(公告)日:2024-06-18
申请号:US17169581
申请日:2021-02-08
Applicant: ShanghaiTech University
Inventor: Chao Zhong , Mengkui Cui
IPC: C12N15/62 , B82Y30/00 , C07K14/435 , C09D189/00
CPC classification number: C09D189/00 , C07K14/435 , C07K2319/20
Abstract: Liquid-liquid phase separation (LLPS) driven protein-based underwater adhesive coatings are made from a dimeric protein comprising a marine adhesive protein (MAP) domain and a liquid-liquid phase separation-mediating low complexity (LC) domain.
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39.
公开(公告)号:US20240135989A1
公开(公告)日:2024-04-25
申请号:US18377840
申请日:2023-10-08
Applicant: SHANGHAITECH UNIVERSITY
Inventor: Hongtu ZHANG , Yuhao SHU , Yajun HA
IPC: G11C11/419 , G11C8/16 , G11C11/54
CPC classification number: G11C11/419 , G11C8/16 , G11C11/54
Abstract: A dual-six-transistor (D6T) in-memory computing (IMC) accelerator supporting always-linear discharge and reducing digital steps is provided. In the IMC accelerator, three effective techniques are proposed: (1) A D6T bitcell can reliably run at 0.4 V and enter a standby mode at 0.26 V, to support parallel processing of dual decoupled ports. (2) An always-linear discharge and convolution mechanism (ALDCM) not only reduces a voltage of a bit line (BL), but also keeps linear calculation throughout an entire voltage range of the BL. (3) A bypass of a bias voltage time converter (BVTC) reduces digital steps, but still keeps high energy efficiency and computing density at a low voltage. A measurement result of the IMC accelerator shows that the IMC accelerator achieves an average energy efficiency of 8918 TOPS/W (8b×8b), and an average computing density of 38.6 TOPS/mm2 (8b×8b) in a 55 nm CMOS technology.
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公开(公告)号:US11934459B2
公开(公告)日:2024-03-19
申请号:US17799278
申请日:2021-09-22
Applicant: SHANGHAITECH UNIVERSITY
Inventor: Guangyao Yan , Xinzhe Liu , Yajun Ha , Hui Wang
IPC: G06T7/162 , G06F16/901 , G06T7/13
CPC classification number: G06F16/9024 , G06T7/13 , G06T7/162 , G06T2207/20072
Abstract: A ripple push method for a graph cut includes: obtaining an excess flow ef(v) of a current node v; traversing four edges connecting the current node v in top, bottom, left and right directions, and determining whether each of the four edges is a pushable edge; calculating, according to different weight functions, a maximum push value of each of the four edges by efw=ef(v)*W, where W denotes a weight function; and traversing the four edges, recording a pushable flow of each of the four edges, and pushing out a calculated flow. The ripple push method explores different push weight functions, and significantly improves the actual parallelism of the push-relabel algorithm.
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